IP Library Granted Patent US 8,521,119
Granted Patent B2
US 8,521,119 · App. 13/114,960 · Granted Aug 27, 2013

Method and apparatus for an equalized on-die termination (ODT) circuit

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Quick Facts
Patent No.
US 8,521,119
App. No.
13/114,960
Granted
Aug 27, 2013
Kind
B2
Abstract

A method and apparatus for an equalized On-Die Termination (ODT) circuit uses timed switching to reduce receiver power consumption.

Claims (8)

1. A method comprising:

terminating a receiver input to a positive potential through a first controllable impedance;

terminating said receiver input to a ground potential through a second controllable impedance;

communicating a receiver output to said first controllable impedance;

communicating said receiver output to said second controllable impedance;

storing in said receiver a previous state of said receiver; and

wherein said communicating a receiver output to said first controllable impedance is coupling directly said receiver output to a control input on said first controllable impedance.

2. The method of claim 1 wherein said communicating a receiver output to said second controllable impedance is coupling directly said receiver output to a control input on said second controllable impedance.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2011
From: ATLURI, SURESH; ZHANG, LIANG LEON
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 026333/0921 →