IP Library Granted Patent US 8,405,423
Granted Patent B2
US 8,405,423 · App. 13/119,205 · Granted Mar 26, 2013

Flexible bus driver

Inventor: Philippe Lance (Toulouse, FR)
Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,405,423
App. No.
13/119,205
Granted
Mar 26, 2013
Kind
B2
Abstract

A bus driver has a ground terminal and a first and a second terminal. In a first operation mode the bus driver provides at the first terminal a first output voltage comprising a first data signal; and at the second terminal the bus driver provides a second output voltage comprising a second data signal. In a second operation mode the bus driver provides at the first terminal a first output voltage comprising a third data signal; and at the second terminal the bus driver provides a second output voltage, wherein a curve of the second output voltage is synchronous however inverted in relation to a curve of the first output voltage. An engine comprises a bus driver as set out above.

Claims (47)

1. A bus driver comprising:

a ground terminal and a first and a second terminal for a first and a second bus wire, wherein in a first operation mode the bus driver provides at the first terminal a first output voltage comprising a first data signal according to a peripheral sensor interface (PSI) bus protocol and provides at the second terminal a second output voltage comprising a second data signal according to the PSI bus protocol, wherein the ground terminal is connected to a third bus wire during the first operation mode, wherein in a second operation mode the bus driver provides at the first terminal a third output voltage comprising a third data signal according to a digital serial interface (DSI) bus protocol and provides at the second terminal an inverted third output voltage to provide a differential transmission of the third data signal according to the DSI bus protocol, wherein each of the third output voltage and the inverted third output voltage is an electric potential difference in relation to a potential of the ground terminal, wherein the ground terminal is not connected to the third bus wire during the second operation mode.

2. The bus driver as claimed in claim 1 , wherein a peak-to-peak value of the first output voltage has the same value as a peak-to-peak value of the second output voltage.

3. The bus driver as claimed in claim 2 , wherein the bus driver comprises a first and a second data input terminal, wherein in the first operation mode the bus driver has at least one of:

the first output voltage has a curve corresponding to a curve of a voltage at the first data input terminal; and

the second output voltage has a curve corresponding to a curve of a voltage at the second data input terminal.

4. The bus driver as claimed in claim 2 , wherein the bus driver comprises a first and a second data input terminal, wherein in the second operation mode the first output voltage comprising the third data signal has a curve corresponding to a curve of a voltage at the first data input terminal.

5. The bus driver as claimed in claim 2 , wherein the bus driver has a first and a second data input terminal and wherein the bus driver has at least one:

in the first operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal;

in the first operation mode the second output voltage has an inverted curve in relation to a curve of the voltage at the second data input terminal; and

in the second operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal.

6. The bus driver as claimed in claim 2 , wherein the bus driver is an air bag bus driver.

7. An engine, comprising a bus driver as claimed in claim 2 .

8. The bus driver as claimed in claim 1 , wherein the bus driver comprises a first and a second data input terminal, wherein in the first operation mode the bus driver has at least one of the following two features:

the first output voltage has a curve corresponding to a curve of a voltage at the first data input terminal;

the second output voltage has a curve corresponding to a curve of a voltage at the second data input terminal.

9. The bus driver as claimed in claim 8 , wherein the bus driver comprises a first and second data input terminal, wherein in the second operation mode the first output voltage comprising the third data signal has a curve corresponding to a curve of a voltage at the first data input terminal.

10. The bus driver as claimed in claim 8 , wherein the bus driver has a first and a second data input terminal and wherein the bus driver has at least one of:

in the first operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal;

in the first operation mode the second output voltage has an inverted curve in relation to a curve of the voltage at the second data input terminal; and

in the second operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal.

11. The bus driver as claimed in claim 8 , wherein the bus driver is an air bag bus driver.

12. The bus driver as claimed in claim 1 , wherein the bus driver comprises a first and a second data input terminal, wherein in the second operation mode the first output voltage comprising the third data signal has a curve corresponding to a curve of a voltage at the first data input terminal.

13. The bus driver as claimed in claim 12 , wherein the bus driver has a first and a second data input terminal and wherein the bus driver has at least one of:

in the first operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal;

in the first operation mode the second output voltage has an inverted curve in relation to a curve of the voltage at the second data input terminal; and

in the second operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal.

14. The bus driver as claimed in claim 12 , wherein the bus driver is an air bag bus driver.

15. The bus driver as claimed in claim 1 , wherein the bus driver has a first and a second data input terminal and wherein the bus driver has at least one of:

in the first operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal;

in the first operation mode the second output voltage has an inverted curve in relation to a curve of the voltage at the second data input terminal; and

in the second operation mode the first output voltage has an inverted curve in relation to a curve of the voltage at the first data input terminal.

16. The bus driver as claimed in claim 1 , wherein the bus driver is an air bag bus driver.

17. An Engine, comprising a bus driver as claimed in claim 1 .

18. The engine as claimed in claim 17 , wherein the engine is one of a vehicle, a manufacturing apparatus, or a manufacturing plant.

19. A bus driver comprising:

a first terminal to connect to a first bus wire;

a second terminal to connect to a second bus wire;

a first ground terminal connected to a ground and coupled to the first terminal; and

a second ground terminal connected to the ground and coupled to the second terminal, wherein in a first operation mode the bus driver provides at the first terminal a first output voltage signal including a first data signal and provides at the second terminal a second output voltage signal including a second data signal, wherein the first ground terminal is connected to a third bus wire and the second ground terminal is connected to a fourth bus wire during the first operation mode, wherein in a second operation mode the bus driver provides at the first terminal a third output voltage signal including a third data signal and provides at the second terminal an inverted third output voltage signal to provide a differential transmission of the third data signal, wherein each of the third output voltage signal and the inverted third output voltage is an electric potential difference in relation to a potential of the ground, wherein the first ground terminal is not connected to the third bus wire and the second ground terminal is not connected to the fourth bus wire during the second operation mode.

20. A method for controlling a bus driver, the method comprising:

during a first operation mode:

providing, at a first terminal of the bus driver, a first output voltage signal including a first data signal, wherein the first terminal is to connect to a first bus wire, and wherein the a ground terminal of the bus driver is to connect to a third bus wire during the first operation mode; and

providing, at a second terminal of the bus driver, a second output voltage signal including a second data signal, wherein the second terminal is configured to connect to a second bus wire; and

during a second operation mode:

providing, at the first terminal, a third output voltage signal including a third data signal, wherein the first terminal is to connect to the first bus wire, wherein the ground terminal is not connected to the third bus wire during the second operation mode; and

providing, at the second terminal, an inverted third output voltage signal to the second terminal, to provide a differential transmission of the third data signal in the second operation mode, wherein each of the third output voltage signal and the inverted third output voltage signal is an electric potential difference in relation to a potential of the ground terminal.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2011
From: LANCE, PHILIPPE
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 025964/0971 →
Continuity (1)
Related Publication 20110163782A1 · Jul 7, 2011