3D integration of a MIM capacitor and a resistor
View Patent ↗The present invention relates to an electronic component, that comprises, on a substrate, at least one integrated MIM capacitor, ( 114 ) an electrically insulating first cover layer ( 120 ) which partly or fully covers the top capacitor electrode ( 118 ) and is made of a lead-containing dielectric material, and a top barrier layer ( 122 ) on the first cover layer. The top barrier layer serves for avoiding a reduction of lead atoms comprised by the first cover layer under exposure of the first cover layer to a reducing substance. An electrically insulating second cover layer ( 124 ) on the top barrier layer has a dielectric permittivity smaller than that of the first cover layer establishes a low parasitic capacitance of the cover-layer structure. The described cover-layer structure with the intermediate top barrier layer allows to fabricate a high-accuracy resistor layer ( 126.1 ) on top.
1. An electronic component, comprising on a substrate:
at least one integrated MIM capacitor having a top capacitor electrode, and a bottom capacitor electrode at a smaller distance from the substrate than the top capacitor electrode;
an electrically insulating first cover layer on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material;
a top barrier layer on the first cover layer, which top barrier layer is suitable for avoiding a reduction of lead atoms comprised by the first cover layer under exposure of the first cover layer to a reducing substance;
an electrically insulating second cover layer on the top barrier layer, which second cover layer partly or fully covers the first cover layer and the top barrier layer and has a dielectric permittivity smaller than that of the first cover layer; and
an electrically conductive resistor layer arranged on the second cover layer, which resistor layer is either connected or connectable to form a resistor of a defined ohmic resistance in an electronic circuit, wherein the top barrier layer is made of barium titanate, strontium titanate, barium strontiun titanate, strontium zirconate, zirconium oxide or zirconium titanate or a combination of at least two of these materials, wherein the top barrier layer is in contacted with the first cover layer and with the second cover layer, and wherein the second cover layer is made of a material containing hydrogen.
2. The electronic component of claim 1 , wherein the top barrier layer has a thickness of between 20 and 200 nm.
3. The electronic component of claim 1 , wherein the MIM capacitor has a dielectric layer with a relative dielectric permittivity of between 100 and 5000.
4. The electronic component of claim 1 , wherein the MIM capacitor has a dielectric layer made of lead zirconate titanate, i.e., PZT, or lanthanum-doped PZT, i.e., PLZT, or magnesium-doped lead niobate lead titanate, i.e., PMNPT, or a combination thereof.
5. The electronic component of claim 1 , wherein the first cover layer is made of PZT.
6. The electronic component of claim 1 , wherein the first cover layer has a thickness of between 90 and 300 nm.
7. The electronic component of claim 1 , wherein either the lead-containing dielectric material or the material containing hydrogen includes silicon nitride, silicon oxide, or silicon oxynitride.
8. The electronic component of claim 3 , comprising a bottom barrier layer made of a dielectric material between the substrate and the bottom electrode.
9. The electronic component of claim 1 , wherein the resistor layer comprises an alloy of one or more elements of Mo, Ni, Cr, Ti, Si or W, or is made from a semiconducting material.
10. The electronic component of claim 1 , wherein the resistor layer is directly connected with the top electrode.
11. An electronic device, comprising the electronic component of claim 1 and at least one active semiconductor element integrated on the same substrate.
12. An ESD protection device, comprising an electronic component according to claim 3 connected with at least one semiconductor diode in the substrate.
13. A method for fabricating an electronic component, comprising:
fabricating, on a substrate, at least one integrated MIM capacitor having a top capacitor electrode, and a bottom capacitor electrode at a smaller distance from the substrate than the top capacitor electrode;
fabricating an electrically insulating first cover layer on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material;
fabricating a top barrier layer on the first cover layer, which top barrier layer is suitable for avoiding a reduction of lead atoms comprised by the first cover layer under exposure of the first cover layer to a reducing substance, wherein the top barrier layer is made of barium titanate, strontium titanate, barium strontiun titanate, strontium zirconate, zirconium oxide or zirconium titanate or a combination of at least two of these materials;
fabricating an electrically insulating second cover layer on the top barrier layer, which second cover layer partly or fully covers the first cover layer and the barrier layer and has a dielectric permittivity smaller than that of the first cover layer, wherein the top barrier layer is in contacted with the first cover layer and with the second cover layer, and wherein the second cover layer is made of a material containing hydrogen; and
fabricating an electrically conductive resistor layer on the second cover layer, which resistor layer has a defined ohmic resistance.
14. A method for fabricating an electronic device according to claim 11 , comprising fabricating an electronic component according to the method of claim 13 .