Semiconductor device and method of manufacturing the same

1. A semiconductor device comprising:

a semiconductor substrate;

a multilevel wiring layer structure on the semiconductor substrate; and

a variable resistance element in the multilevel wiring layer structure;

wherein the variable resistance element comprises a variable resistance element film disposed between a top electrode and a bottom electrode;

wherein the variable resistance element film comprises a film whose resistance changes based on actions of a metal of the bottom electrode;

wherein the multilevel wiring layer structure comprises at least a wiring electrically connected to the bottom electrode and a plug electrically connected to the top electrode;

wherein said wiring also serves as the bottom electrode;

wherein an insulating barrier film is in contact with the bottom electrode and the variable resistance element film in a portion arranged between the bottom electrode and the variable resistance element film;

wherein the insulating barrier film has an opening;

wherein the variable resistance element film is in contact with the bottom electrode in the opening;

wherein the variable resistance element film is an oxide including Ta or TaSi; and

wherein the variable resistance element film has a laminate structure in which Ta 2 O 5 and TaSiO are stacked in this order from bottom to top.

2. The semiconductor device according to claim 1 ,

wherein the variable resistance element film has a bottom surface at a periphery of a connection portion between the wiring and the variable resistance element film; and

wherein the bottom surface is set at an angle of 85 degrees or less with respect to a top surface of said wiring.

3. The semiconductor device according to claim 1 ,

wherein the opening has a tapered wall surface and has a wider diameter at a portion farther from said wiring;

wherein the tapered surface is set at an angle of 85 degrees or less with respect to a top surface of the wiring; and

wherein the variable resistance element film is arranged so that a periphery of a connection portion between said wiring and the variable resistance element film is at least arranged on the tapered surface.

4. The semiconductor device according to claim 1 , wherein an area of a region where the plug and the top electrode are connected is smaller than an area of a region where the variable resistance element film and said wiring are connected.

5. The semiconductor device according to claim 1 , wherein a region where the plug and the top electrode are connected is arranged in a region different from a region where the variable resistance element film and said wiring are connected.

6. The semiconductor device according to claim 1 , wherein said wiring is made of copper.

7. The semiconductor device according to claim 6 , wherein said wiring is alloyed with Al or a surface of said wiring is converted into silicide or nitride.

8. The semiconductor device according to claim 1 ,

wherein the top electrode has a structure in which a first top electrode and a second top electrode are stacked in this order on the variable resistance element film;

wherein the first top electrode comprises a metal material having a smaller absolute value in oxidation free energy than that of a metal component of the variable resistance element film; and

wherein the second top electrode is in contact with the plug.

9. The semiconductor device according to claim 8 , wherein the first top electrode is made of Pt, Ru, or oxide thereof.

10. The semiconductor device according to claim 8 , wherein the second top electrode is made of Ti, Ta, W, or nitride thereof.

11. The semiconductor device according to claim 1 , comprising a second bottom electrode arranged between the wiring and the variable resistance element film and having diffusion barrier properties for a metal of said wiring.

12. The semiconductor device according to claim 11 ,

wherein the second bottom electrode is an electrode having a laminate structure of two layers; and

wherein one of the layers that is on the variable resistance element film is made of a material identical to that of the first top electrode.

13. The semiconductor device according to claim 11 , wherein the second bottom electrode is an electrode in which TaN and Ru are stacked in this order on said wiring.

14. The semiconductor device according to claim 11 , comprising a second variable resistance element film arranged between the variable resistance element film and the top electrode and made of a metal oxide having a larger absolute value in oxidation free energy than that of a metal component of the variable resistance element film.

15. The semiconductor device according to claim 14 , wherein the second variable resistance element film is made of oxide of Ti or Ni.

16. The semiconductor device according to claim 3 ,

wherein a hard mask film is arranged on the top electrode;

wherein a laminate body of the hard mask film, the top electrode, and the variable resistance element film has top and side surfaces covered by a protective insulating film;

wherein the protective insulating film is in contact with the insulating barrier film at a periphery of the laminate body of the hard mask film, the top electrode, and the variable resistance element film; and

wherein the plug extends in a prepared hole formed in the protective insulating film and the hard mask film and is electrically connected to the top electrode.

17. The semiconductor device according to claim 3 ,

wherein a hard mask film is arranged on the top electrode;

wherein a second hard mask film made of a material different from that of the hard mask film is arranged on the hard mask film;

wherein a laminate body of the second hard mask film, the hard mask film, the top electrode, and the variable resistance element film has a side surface covered by a protective insulating film;

wherein the protective insulating film is in contact with the insulating barrier film at a periphery of the laminate body of the second hard mask film, the hard mask film, the top electrode, and the variable resistance element film; and

wherein the plug extends in a prepared hole formed in the second hard mask film and the hard mask film and is electrically connected to the top electrode.

18. The semiconductor device according to claim 17 ,

wherein a laminate body of the second hard mask film, the hard mask film, the top electrode, and the variable resistance element film has top and side surfaces covered by a protective insulating film;

wherein the protective insulating film is in contact with the insulating barrier film at a periphery of the laminate body of the second hard mask film, the hard mask film, the top electrode, and the variable resistance element film; and

wherein the plug extends in a prepared hole formed in the protective insulating film, the second hard mask film, and the hard mask film and is electrically connected to the top electrode via a barrier metal.

19. The semiconductor device according to claim 16 , wherein the protective insulating film is made of a material identical to that of the hard mask film and the insulating barrier film.

20. The semiconductor device according to claim 1 , comprising a second variable resistance element that is formed in a layer identical to or different from that of the variable resistance element in the multilevel wiring layer structure and that comprises a variable resistance element film whose resistance changes between a top electrode and a bottom electrode.

21. The semiconductor device according to claim 20 ,

wherein the multilevel wiring layer structure comprises at least a second wiring electrically connected to the bottom electrode of the second variable resistance element and a second plug electrically connected to the top electrode of the second variable resistance element; and

wherein the second wiring also serves as the bottom electrode of the second variable resistance element.

22. The semiconductor device according to claim 21 , wherein the second wiring is integrated with the plug.

23. The semiconductor device according to claim 1 ,

wherein the variable resistance element film is in contact with the insulating barrier film at a periphery of the opening.

24. The semiconductor device according to claim 1 ,

wherein the plug is integral with another wiring in an upper portion of the plug.

25. The semiconductor device according to claim 1 ,

wherein the plug and another wiring in an upper portion of the plug are formed in interlayer insulating films.

26. The semiconductor device according to claim 1 ,

wherein the variable resistance element film is an ion conductive layer.