Physical structure for use in a physical unclonable function
The invention relates to a semiconductor device comprising a physical structure ( 50 ) for use in a physical unclonable function, wherein the physical structure ( 50 ) comprises a lead-zirconium titanate layer ( 25 ), and a silicon-comprising dielectric layer ( 27 ) deposited on the lead-zirconium-titanate layer ( 25 ), wherein the silicon-comprising dielectric layer ( 27 ) has a rough surface (SR), the physical structure ( 50 ) further comprising a conductive layer ( 30 ) provided on the rough surface (SR) of the silicon-comprising dielectric layer ( 27 ). The invention further relates to a method of manufacturing such semiconductor device. The invention also relates to a card, such as a smartcard, and to a RFID tag comprising such semiconductor device. The inventors have found that depositing of a silicon- comprising dielectric layer ( 27 ) on a lead-zirconium titanate layer ( 25 ) using vapor deposition results in a silicon-comprising dielectric layer ( 27 ) having a rough surface (SR). This rough surface (SR) can be used in a PUF to make a resistor (R) with a variable random value by depositing a conductive layer ( 30 ) on the rough surface (SR). Alternatively, the combination of both layers ( 25, 27 ) can be used in a PUF as composite dielectric to make a capacitor (C) with a variable random capacitance value.
1. A semiconductor device comprising a physical structure for use in a physical unclonable function, wherein the physical structure comprises a lead-zirconium titanate layer, and a silicon-comprising dielectric layer deposited on the lead-zirconium-titanate layer, wherein the silicon-comprising dielectric layer has a rough surface, the physical structure further comprising a conductive layer provided on the rough surface of the silicon-comprising dielectric layer.
2. The semiconductor device as claimed in claim 1 , wherein the conductive layer comprises a plurality of conductors for forming a plurality of electrical elements for use in the physical unclonable function.
3. The semiconductor device as claimed in claim 2 , wherein the plurality of conductors are formed as resistances for use in the physical unclonable function.
4. The semiconductor device as claimed in claim 1 , wherein the physical structure further comprises a further conductive layer onto which the lead-zirconium-titanate layer is provided for forming at least one capacitor between the conductive layer and the further conductive layer.
5. The semiconductor device as claimed in claim 4 , wherein locally the silicon-comprising dielectric layer is planar for forming a reference capacitor.
6. The semiconductor device as claimed in claim 4 , wherein locally the conductive layer is directly provided on the lead-zirconium-titanate layer for forming a further reference capacitor.
7. The semiconductor device as claimed in claim 1 , wherein the semiconductor device comprises a substrate and an electronic circuit integrated into the substrate.
8. The semiconductor device as claimed in claim 7 , wherein the substrate comprises a semiconductor body and an interconnect stack provided on the semiconductor body, wherein the electronic circuit comprises electronic components and interconnections between the electronic components, wherein the electronic components are integrated into the semiconductor body, and wherein the interconnections are integrated into the interconnect stack.
9. The semiconductor device as claimed in claim 8 , wherein the physical structure has been integrated within the interconnect stack.
10. The semiconductor device as claimed in claim 8 , wherein the physical structure has been integrated on the interconnect stack.
11. The semiconductor device as claimed in claim 1 , wherein the silicon-comprising dielectric layer comprises a material selected from the group consisting of: silicon nitride, silicon oxide, and silicon oxy-nitride.
12. A method of manufacturing a semiconductor device comprising a physical structure for use in a physical unclonable function, the method comprising:
providing a lead-zirconium-titanate layer;
depositing the silicon-comprising dielectric layer on the lead-zirconium-titanate layer using a vapor deposition technique for obtaining a silicon-comprising dielectric layer having rough surface, and
providing the conductive layer on the silicon-comprising dielectric layer.
13. The method as claimed in claim 12 , wherein a roughness of the rough surface is controlled by setting a specific vapor deposition temperature, within the range from 200° C. to 500° C.
14. The method as claimed in claim 13 , wherein the vapor deposition technique used is one of the group consisting of:
chemical vapor deposition, and atomic layer deposition.
15. A card or an RFID tag comprising a semiconductor device as claimed in claim 1 .