A DUT is connected to an I/O terminal. An AC test unit performs an AC test operation for the DUT. A DC test unit performs a DC test operation for the DUT. An optical semiconductor switch is arranged such that a first terminal thereof is connected to the AC test unit and a second terminal thereof is connected to the I/O terminal. The optical semiconductor switch 10 is configured to be capable of switching states, according to control signals input to control terminals, between a connection state in which the first terminal and the second terminal are connected to each other, and a disconnection state in which they are disconnected from each other. A first impedance circuit is arranged on a signal line for the control signal to be input to the positive-electrode control terminal. Furthermore, a second impedance circuit is arranged on a signal line for the control signal to be input to the negative-electrode control terminal.
1. A pin card comprising:
an input/output terminal to be connected to a device under test;
a DC test unit configured to perform a DC test operation for the device under test;
an optical semiconductor switch arranged such that a first terminal thereof is connected to an AC test unit configured to perform an AC test operation for the device under test, and a second terminal thereof is connected to the input/output terminal and the DC test unit configured to perform the DC test operation for the device under test, and configured to be capable of switching states, according to control signals input to a positive control terminal and a negative control terminal thereof, between a connection state in which the first terminal and the second terminal are connected to each other, and a disconnection state in which the first terminal and the second terminal are disconnected from each other;
a first impedance circuit arranged on a signal path for the control signal to be input to the positive control terminal of the optical semiconductor switch; and
a second impedance circuit arranged on a signal path for the control signal to be input to the negative control terminal of the optical semiconductor switch.
2. A pin card according to claim 1 , wherein, in the DC test operation, the optical semiconductor switch is set to the disconnection state, and the AC test unit is controlled to be set to a silent state.
3. A pin card according to claim 1 , wherein at least one of the first and second impedance circuits includes a ferrite bead and a resistor element arranged in series or in parallel.
4. A pin card according to claim 3 , wherein the ferrite bead has an impedance of 100Ω to 1 MΩ in a frequency range of 1 to 10 GHz.
5. A pin card according to claim 1 , wherein at least one of the first and second impedance circuits includes a resistor element.
6. A pin card according to claim 1 , wherein at least one of the first and second impedance circuits includes an inductor and a resistor arranged in series or in parallel.
7. A pin card according to claim 1 , wherein at least one of the first impedance circuit and the second impedance circuit includes a variable capacitance element,
and wherein the pin card is configured such that the pass band thereof can be controlled according to the capacitance of the variable capacitance element.
8. A test apparatus comprising:
an input/output terminal to be connected to a device under test;
an AC test unit configured to perform an AC test operation for the device under test;
a DC test unit configured to perform a DC test operation for the device under test;
an optical semiconductor switch arranged such that a first terminal thereof is connected to the AC test unit and a second terminal thereof is connected to the input/output terminal, and configured to be capable of switching states, according to control signals input to a positive control terminal and a negative control terminal thereof, between a connection state in which the first terminal and the second terminal are connected to each other, and a disconnection state in which the first terminal and the second terminal are disconnected from each other;
a first impedance circuit arranged on a signal path for the control signal to be input to the positive control terminal of the optical semiconductor switch; and
a second impedance circuit arranged on a signal path for the control signal to be input to the negative control terminal of the optical semiconductor switch.
9. A test apparatus according to claim 8 , wherein, in the DC test operation, the optical semiconductor switch is set to a disconnection state, and the AC test unit is controlled to be set to a silent state.