ESD protection circuit
One embodiment of the disclosure provides an electrostatic discharge protection circuit, including a first resistor, a p-type field effect transistor, a capacitance device and an n-type field effect transistor. The first resistor has a first terminal coupled to a first rail and a second terminal coupled to a first node. The p-type field effect transistor has a source coupled to the first rail, a gate coupled to the first node and a drain coupled to a second node. The capacitance device has a first terminal coupled to a second rail or the second node and a second terminal coupled to the first node. The n-type field effect transistor has a source coupled to the second rail, a gate coupled to the second node and a drain coupled to the first node.
1. An electrostatic discharge protection circuit, comprising:
a first resistor, having a first terminal coupled to a first rail and a second terminal coupled to a first node;
a p-type field effect transistor, having a source coupled to the first rail, a gate coupled to the first node and a drain coupled to a second node;
a capacitance device, having a first terminal coupled to a second rail or the second node and a second terminal coupled to the first node; and
an n-type field effect transistor, having a source coupled to the second rail, a gate coupled to the second node and a drain coupled to the first node, wherein the p-type field effect transistor is formed on a first N-well, and the first N-well and the n-type field effect transistor are formed on a substrate, the electrostatic discharge protection circuit further comprises a parasitic silicon controlled rectifier constructed by the source of the p-type field effect transistor, the first N-well, the substrate and the source of n-type field effect transistor, the parasitic silicon controlled rectifier further comprises a first control terminal coupled to the second node and/or a second control terminal coupled to a third node, the parasitic silicon controlled rectifier is triggered by injecting current into the first control terminal and/or drawing current from the second control terminal.
2. The electrostatic discharge protection circuit as claimed in claim 1 , further comprising:
a first diode, having an anode coupled to the drain of a p-type field effect transistor and a cathode coupled to the second node; and
a second diode, having an anode coupled to the first node and a cathode coupled to the drain of the n-type field effect transistor.
3. The electrostatic discharge protection circuit as claimed in claim 1 , further comprising a discharge device, having a control terminal coupled to the second node, wherein the control terminal is arranged to trigger the discharge device.
4. The electrostatic discharge protection circuit as claimed in claim 1 , further comprising a third diode, having an anode coupled to a parasitic silicon controlled rectifier or a control terminal of a discharge device and a cathode coupled to the first node.
5. The electrostatic discharge protection circuit as claimed in claim 4 , further comprising a second resistor, having a first terminal coupled to the second rail and a second terminal coupled to the second node.
6. The electrostatic discharge protection circuit as claimed in claim 2 , further comprising:
a first diode string, having an anode coupled to the cathode of the first diode and a cathode coupled to the second node; and
a second diode string, having an anode coupled to the cathode of the second diode and a cathode coupled to the drain of the n-type field effect transistor.
7. The electrostatic discharge protection circuit as claimed in claim 1 , wherein the capacitance device is a diode device, a plate capacitor or a MOS capacitors.
8. An electrostatic discharge protection circuit, comprising:
a substrate, having a first contact point;
a first resistor, having a first terminal coupled to a first rail and a second terminal;
a first N-well, formed in the substrate and having a second contact point coupled to the first rail;
a p-type field effect transistor, formed on the first N-well and comprising:
a first p-type doped region, formed on the first N-well and coupled to a second node;
a first gate, coupled to the second terminal of the first resistor; and
a second p-type doped region, formed on the first N-well and coupled to the first rail;
an n-type field effect transistor, formed on the substrate and comprising:
a second gate, coupled to the second node;
a first n-type doped region, formed on the substrate and coupled to a second rail; and
a second n-type doped region, formed on the substrate and coupled to the second terminal of the first resistor;
a capacitance device, having a first terminal coupled to the second rail or the second node and a second terminal coupled to the second terminal of the first resistor, wherein the second rail is coupled to the first contact point;
a parasitic silicon controlled rectifier, wherein the parasitic silicon controlled rectifier is constructed by the second p-type doped region of the p-type field effect transistor, the first N-well, the substrate and the first n-type doped region of n-type field effect transistor; and
a fourth contact point coupled to the second node.
9. The electrostatic discharge protection circuit as claimed in claim 8 , further comprising:
a first diode, having an cathode coupled to the second node and an anode coupled to the first p-type doped region; and
a second diode, having a cathode coupled to the second n-type doped region and an anode coupled to the second terminal of the first resistor.
10. The electrostatic discharge protection circuit as claimed in claim 8 , wherein the fourth contact point is deposited between the first n-type doped region and the second p-type doped region.
11. The electrostatic discharge protection circuit as claimed in claim 10 , wherein the first N-well is laterally extended to be under the fourth contact point.
12. The electrostatic discharge protection circuit as claimed in claim 10 , wherein the first N-well further comprises a fifth contact point, and the electrostatic discharge protection circuit further comprises a third diode having an anode coupled to the fifth contact point and a cathode coupled to the second terminal of the first resistor.
13. The electrostatic discharge protection circuit as claimed in claim 12 , wherein the first N-well is laterally extended to be under the fourth contact point.
14. The electrostatic discharge protection circuit as claimed in claim 12 , wherein the first N-well is laterally extended to be under the fifth contact point.
15. The electrostatic discharge protection circuit as claimed in claim 8 , further comprising a second resistor, having a first terminal coupled to the second rail and a second terminal coupled to the second gate.
16. The electrostatic discharge protection circuit as claimed in claim 15 , wherein the first N-well further comprises a fifth contact point, and the electrostatic discharge protection circuit further comprises a third diode having an anode coupled to the fifth contact point and a cathode coupled to the second terminal of the first resistor.
17. The electrostatic discharge protection circuit as claimed in claim 8 , wherein the capacitance device is a diode device.
18. The electrostatic discharge protection circuit as claimed in claim 17 , wherein the diode device is constructed by at least one second N-well and the substrate, and the second N-well includes a third contact point coupled to the second terminal of the first resistor.
19. The electrostatic discharge protection circuit as claimed in claim 8 , wherein the capacitance device is a plate capacitor or a MOS capacitors.
20. The electrostatic discharge protection circuit as claimed in claim 9 , further comprising:
a first diode string, having an anode coupled to the cathode of the first diode and a cathode coupled to the second gate of the n-type field effect transistor; and
a second diode string, having an anode coupled to the cathode of the second diode and a cathode coupled to the drain of the n-type field effect transistor.