IP Library Granted Patent US 8,866,272
Granted Patent B2
US 8,866,272 · App. 13/155,203 · Granted Oct 21, 2014

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

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Quick Facts
Patent No.
US 8,866,272
App. No.
13/155,203
Granted
Oct 21, 2014
Kind
B2
Abstract

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feature on at least one of a back side of the microelectronic die and the support member. The attachment feature includes a volume of solder material. The method also includes contacting the attachment feature with the other of the microelectronic die and the support member, and reflowing the solder material to join the back side of the die and the support member via the attachment feature. In several embodiments, the attachment feature is not electrically connected to internal active structures of the die.

Claims (17)

1. A packaged microelectronic device, comprising:

a support member comprising a first side, a second side opposite the first side, a plurality of support member terminals at the first side, and a plurality of contact pads at the second side and electrically coupled to corresponding support member terminals;

a microelectronic die having a front side and a back side opposite the front side, wherein the back side is facing the support member, and the microelectronic die includes a plurality of terminals at the front side of the die and electrically coupled to corresponding support member terminals with a plurality of wire bonds; and

an attachment feature between the support member and the back side of the microelectronic die and attached to each of the support member and the microelectronic die, wherein the attachment feature is composed of a solder material, and wherein the attachment feature includes at least one of (a) a single, unitary structure covering at least approximately all of the back side of the die, and (b) a feature not electrically connected to internal active structures of the microelectronic die.

2. The device of claim 1 wherein the microelectronic die further comprises a conductive layer at the back side of the die and in contact with the attachment feature.

3. The device of claim 2 wherein:

the attachment feature comprises a plurality of pre-formed solder balls arranged in an array on the support member; and

the conductive layer comprises a plurality of solder bumps at the back side of the die and arranged in a pattern corresponding at least in part to the arrangement of solder balls, and wherein the solder bumps are attached to corresponding solder balls.

4. The device of claim 1 wherein the attachment feature comprises a layer of solder material having a generally uniform thickness between the support member and the microelectronic die.

5. The device of claim 4 wherein the microelectronic die is electrically coupled to a grounding feature of the support member via the attachment feature.

6. The device of claim 1 wherein the attachment feature comprises a plurality of pre-formed solder balls between the support member and the microelectronic die.

7. The device of claim 1 wherein the attachment feature is not electrically connected to internal active structures of the support member.

8. The system of claim 1 wherein the microelectronic die comprises one of a processor, a memory device, an imager, a filter, or a sensor.

9. The device of claim 1 wherein the support member comprises an interposer substrate.

10. The device of claim 1 wherein the attachment feature is composed of a lead-free solder material.

11. The device of claim 1 wherein the attachment feature is composed of SnAgCu, SnAg, or SnAu solder.

12. The device of claim 1 wherein the attachment feature comprises a unitary, generally-rigid component between the die and the support member, and wherein the attachment feature is positioned to provide generally consistent stress distribution within the device.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →