Memory cell with resistance-switching layers including breakdown layer
View Patent ↗A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has a resistance-switching layer, a conductive intermediate layer, and first and second electrodes at either end of the RSME. A breakdown layer is electrically between, and in series with, the second electrode and the intermediate layer. The breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.
1. A resistance-switching memory cell, comprising:
first and second electrodes;
a conductive or semiconductive intermediate layer electrically between, and in series with, the first and second electrodes;
a resistance-switching layer electrically between, and in series with, the first electrode and the conductive or semiconductive intermediate layer; and
a breakdown layer electrically between, and in series with, the second electrode and the conductive or semiconductive intermediate layer, the breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state.
2. The resistance-switching memory cell of claim 1 , wherein:
the breakdown layer is selected from the group consisting of SiN, SiO 2 , SiC, SiCN and SiON.
3. The resistance-switching memory cell of claim 1 , wherein:
the breakdown layer has an I-V characteristic of a breakdown state.
4. The resistance-switching memory cell of claim 1 , wherein:
the resistance-switching layer comprises MeOx.
5. The resistance-switching memory cell of claim 1 , wherein:
the breakdown layer is a one-time programmable material; and
the resistance-switching layer is a many-times programmable material.
6. The resistance-switching memory cell of claim 1 , further comprising:
a steering element in series with the first and second electrodes, the conductive or semiconductive intermediate layer, the first resistance-switching layer and the breakdown layer.
7. The resistance-switching memory cell of claim 6 , wherein:
the steering element comprises a diode.
8. A resistance-switching memory cell, comprising:
a steering element; and
a resistance-switching memory element in series with the steering element, the resistance-switching memory element comprising:
first and second electrodes;
a conductive or semiconductive intermediate layer electrically between, and in series with, the first and second electrodes;
a resistance-switching layer electrically between, and in series with, the first electrode and the conductive or semiconductive intermediate layer; and
a breakdown layer electrically between, and in series with, the second electrode and the conductive or semiconductive intermediate layer, the breakdown layer maintains a resistance of at least about 1-10 MΩ while in a conductive state.
9. The resistance-switching memory cell of claim 8 , wherein:
the breakdown layer is selected from the group consisting of SiN, SiO 2 , SiC, SiCN and SiON.
10. The resistance-switching memory cell of claim 8 , wherein:
the breakdown layer has an I-V characteristic of a breakdown state.
11. The resistance-switching memory cell of claim 8 , wherein:
the resistance-switching layer comprises MeOx.
12. The resistance-switching memory cell of claim 8 , wherein:
the breakdown layer is a one-time programmable material; and
the resistance-switching layer is a many-times programmable material.
13. The resistance-switching memory cell of claim 8 , wherein:
the steering element comprises a diode.
14. A memory device, comprising:
a memory array comprising a plurality of memory cells, each memory cell comprising a steering element in series with a resistance-switching memory element, each resistance-switching memory element comprising:
first and second electrodes;
a conductive or semiconductive intermediate layer electrically between, and in series with, the first and second electrodes;
a resistance-switching layer electrically between, and in series with, the first electrode and the conductive or semiconductive intermediate layer; and
a breakdown layer electrically between, and in series with, the second electrode and the conductive or semiconductive intermediate layer, the breakdown layer maintains
a resistance of at least about 1-10 MΩ while in a conductive state.
a plurality of word lines and bit lines;
each memory cell having one end in communication with a respective bit line of the plurality of bit lines, and another end in communication with a respective word line of the plurality of word lines; and
control circuitry in communication with the plurality of word lines and bit lines, the control circuitry applies a voltage to at least one of the memory cells via the respective bit line and the word line thereof, to cause the resistance-switching memory element of the at least one of the memory cells to switch from one resistance state to another resistance state.
15. The memory device of claim 14 , wherein:
each steering element comprises a diode.
16. The memory device of claim 14 , wherein:
the memory array is monolithic three-dimensional array that includes multiple levels of memory cells, each memory level includes multiple memory cells in a cross-point array.
17. The memory device of claim 14 , wherein:
the breakdown layer is selected from the group consisting of SiN, SiO 2 , SiC, SiCN and SiON.
18. The memory device of claim 14 , wherein:
the breakdown layer is a one-time programmable material; and
the resistance-switching layer is a many-times programmable material.
19. The resistance-switching memory cell of claim 14 , wherein:
the breakdown layer has an I-V characteristic of a breakdown state.
20. The resistance-switching memory cell of claim 14 , wherein:
the resistance-switching layer comprises MeOx.