Program and read trim setting
A method and apparatus for setting trim parameters in a memory device provides multiple trim settings that are assigned to portions of the memory device according to observed or tested programming speed and reliability.
1. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory;
testing first and second portions of the memory device; and
assigning a first one of the plurality of trim settings to the first portion of the memory device based on a result of the testing of the first portion of the memory device and assigning a second one of the plurality of trim settings to the second portion of the memory device based on a result of the testing of the second portion of the memory device.
2. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
wherein programming the plurality of trim settings comprises:
programming a program trim voltage, a step-up trim voltage, and a program pulse width for each of the plurality of trim settings.
3. The method of claim 1 , wherein the first and second portions of the memory device are respectively first and second blocks of the memory device.
4. The method of claim 1 , wherein the first and second portions of the memory device are respectively first and second rows of the memory device.
5. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
wherein the first and second portions of the memory device are respectively first and second columns of the memory device.
6. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
testing a program speed for each of the first and second portions; and
determining that the first one of the plurality of trim settings is most effective for operations of the first portion and that the second one of the plurality of trim settings is most effective for operations of the second portion.
7. The method of claim 1 , wherein the plurality of trim settings is four.
8. The method of claim 1 , wherein the plurality of trim settings is three.
9. The method of claim 1 , wherein the plurality of trim settings is 2 n , where n is a positive integer.
10. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device; and
storing the plurality of trim settings in a trim set register having a register entry for each of the trim settings.
11. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
testing each of the first and second portions to determine a program speed of each of the first and second portions; and
assigning the first one of the plurality of trim settings to the first portion based on the determined program speed of the first portion and assigning the second one of the plurality of trim settings to the second portion based on the determined program speed of the second portion.
12. The method of claim 1 , wherein assigning the first one of the plurality of trim settings to the first portion of the memory device comprises assigning trim set parameters for an edge block, and wherein assigning the second one of the plurality of trim settings to the second portion of the memory device comprises assigning trim set parameters for a center block.
13. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
wherein programming the plurality of trim settings comprises:
programming a sensing time, a bitline precharge voltage, and a sensing voltage for each of the plurality of trim settings.
14. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning a first one of the plurality of trim settings appropriate for a first portion of the memory device to the first portion of the memory device and assigning a second one of the plurality of trim settings appropriate for a second portion of the memory device to the second portion of the memory device;
wherein the first one of the plurality of trim settings is different than the second one of the plurality of trim settings.
15. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory;
probing first and second pages of the memory device; and
assigning a first one of the plurality of trim settings to the first page of the memory device based on a result of the probing of the first page of the memory device and assigning a second one of the plurality of trim settings to the second page of the memory device based on a result of the probing of the second page of the memory device.
16. A method of setting trim settings in a memory device, comprising:
programming plurality of trim settings into a memory; and
assigning an appropriate one of the plurality of trim settings for each of a plurality of portions of the memory device;
wherein assigning the plurality of trim settings includes assigning trim set parameters for:
a wide active area and a wide gate;
a wide active area and a narrow gate;
a narrow active area and a wide gate; and
a narrow active area and a narrow gate.
17. The method of claim 16 , wherein the trim settings for a wide active area and a narrow gate, and for a narrow active area and a wide gate are the same.
18. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning an appropriate one of the plurality of trim settings for each of a plurality of portions of the memory device;
wherein assigning the plurality of trim settings include assigning trim parameters to portions according to their programming speed, wherein the trim parameters include parameters for fast programming portions, first intermediate speed programming portions, second intermediate speed programming portions, and slow programming portions.
19. The method of claim 18 , wherein the trim settings for the first intermediate speed programming portions and the second intermediate speed programming portions are the same.
20. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory; and
assigning an appropriate one of the plurality of trim settings for each of a plurality of portions of the memory device;
wherein assigning the plurality of trim settings includes assigning trim set parameters for:
an even row and an even column;
an even row and an odd column;
an odd row and an even column; and
an odd row and odd column.
21. The method of claim 20 , wherein the trim settings for an even row and an even column, and for an odd row and an even column, are the same.
22. A method of setting trim settings in a memory device, comprising:
programming a plurality of trim settings into a memory;
assigning appropriate ones of the plurality of trim settings to respective ones of a plurality of portions of the memory device, wherein assigning for each portion comprises:
testing the portion for programming speed; and
selecting a best of the plurality of trim settings for the portion programming speed.
23. The method of claim 22 , wherein the plurality of portions are a plurality of rows of the memory device, and wherein assigning comprises assigning appropriate ones of the plurality of trim settings to respective ones of the plurality of rows of the memory device.