IP Library Granted Patent US 8,954,312
Granted Patent B2
US 8,954,312 · App. 13/159,378 · Granted Feb 10, 2015

Hardware emulation proxy for hardware software co-emulation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,954,312
App. No.
13/159,378
Granted
Feb 10, 2015
Kind
B2
Abstract

The invention provides for the interaction of an emulator emulating an electronic design having a communication bus communicating with a software application over the emulated communication bus. The interaction is facilitated in such a manner as to provide an appropriate latency for the emulated communication bus. According to various implementations of the invention, a protocol proxy is provided. The protocol proxy is designed to be emulated along with an electronic design and configured to communicate to software executing on a computer connected to the emulator. The protocol proxy includes a protocol module that communicates to the electronic design being emulated in the emulator environment. Furthermore, the protocol proxy includes a software control module that communicates to the software outside the emulator through proxy communication channels. Further still, the protocol proxy includes a data storage component.

Claims (25)

1. A system for emulating an electronic design comprising:

an emulator configured to emulate a design under test that includes a communication bus;

a protocol proxy configured to be emulated by the emulator along with the design under test and to communicate with the design under test using the communication bus, the protocol proxy including a memory component; and

a computer configured to communicate with the protocol proxy;

wherein the protocol proxy is positioned between the computer and the design under test and is configured by the computer to include data values stored in the memory component of the protocol proxy prior to emulation of the design under test, the protocol proxy being configured to use the data values to respond to communications from the design under test without communicating with the computer, thereby reducing latency during execution of the emulator;

wherein the computer communicates with the protocol proxy using a first protocol and the protocol proxy communicates with the design under test using a second protocol, different from the first protocol.

2. The system recited in claim 1 , the protocol proxy comprising:

a communication protocol module; and

a software protocol module.

3. The system recited in claim 2 , the software protocol module being configured to receive instructions from the computer.

4. The system recited in claim 2 , the communication protocol module being configured to communicate with the design under test using the communication bus.

5. The system of claim 1 , wherein the computer is configured to receive monitoring information from the protocol proxy through a log channel.

6. The system of claim 5 , wherein the monitoring information includes information concerning one or more of an initiation of communication with the protocol proxy by the design under test, information concerning when a reset signal has changed state, information concerning when a write has been initiated to the memory component, or information concerning a status update.

7. The system of claim 1 , wherein the software application configures the memory component in the protocol proxy through a command channel.

8. The system of claim 1 , wherein the design under test models a protocol master device and wherein the protocol proxy models a protocol slave device.

9. A system for emulating an electronic design comprising:

an emulator configured to emulate a design under test;

a host computer for executing a software application; and

a protocol proxy positioned in the emulator and between the design under test and the host computer, the protocol proxy including a memory component;

wherein the software application configures the memory component in the protocol proxy with data values stored prior to emulation of the design under test, and the protocol proxy uses the data values during emulation of the design under test in order to reduce latency between communications from the design under test to the protocol proxy;

wherein the software application communicates with the protocol proxy using a first protocol and the protocol proxy communicates with the design under test using a second protocol, different than the first protocol.

10. The system of claim 9 , wherein the protocol proxy is configured to determine that an error condition is detected between the protocol proxy and the design under test and directs the software application to log the error condition.

11. The system of claim 9 , wherein the software application is configured to receive monitoring information from the protocol proxy through a log channel.

12. The system of claim 11 , wherein the monitoring information includes one or more of information concerning initiation of communication with the protocol proxy by the design under test, information concerning when a reset signal has changed state, information concerning when a write has been initiated to the memory component, or information concerning a status update.

13. The system of claim 9 , wherein the design under test models a protocol master device and wherein the protocol proxy models a protocol slave device.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jun 9, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056526/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2011
From: LLORET PORTILIO, LUIS; GHATTAS, GEORGES ANTOUN ELIAS; TADROS, NOHA WAGDY SHAWKY
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026608/0682 →