IP Library Assignment 056526/0054
Patent Assignment
Reel/Frame 056526/0054

Merger and Change of Name

Recorded: 2021-06-09 Pages: 6
Assignors
MENTOR GRAPHICS CORPORATION
Executed: 2020-12-30
SIEMENS INDUSTRY SOFTWARE INC.
Executed: 2020-12-30
Assignee
SIEMENS INDUSTRY SOFTWARE INC.
5800 GRANITE PARKWAY, SUITE 600, PLANO, TEXAS, 75024
Covered Properties (49)
Efficient Sense Command Generation
Patent: 7,852,688 →
Application: 12/108,282 →
Publication: US 2009/0109766
Pruning-Based Variation-Aware Design
Patent: 8,074,189 →
Application: 12/366,239 →
Publication: US 2009/0216359
Global Statistical Optimization, Characterization, and Design
Patent: 8,024,682 →
Application: 12/396,972 →
Publication: US 2009/0228846
Trustworthy Structural Synthesis and Expert Knowledge Extraction with Application to Analog Circuit Design
Patent: 8,443,329 →
Application: 12/466,894 →
Publication: US 2009/0307638
Source Mask Optimization for Microcircuit Design
Patent: 8,151,223 →
Application: 12/503,024 →
Publication: US 2010/0135569
Scan Test Application Through High-Speed Serial Input/Outputs
Patent: 8,726,112 →
Application: 12/506,250 →
Publication: US 2010/0313089
Formal Verification of Clock Domain Crossings
Patent: 8,271,918 →
Application: 12/559,343 →
Publication: US 2010/0199244
Schematic Generation Visualization Aid for Netlists Comprising Analog Circuits
Patent: 8,504,953 →
Application: 12/574,645 →
Publication: US 2010/0095262
Collaborative Environment for Physical Verification of Microdevice Designs
Patent: 8,516,399 →
Application: 12/708,524 →
Publication: US 2011/0016444
Compression Based on Deterministic Vector Clustering of Incompatible Test Cubes
Patent: 8,347,159 →
Application: 12/718,813 →
Publication: US 2010/0229060
Fault Diagnosis for Non-Volatile Memories
Patent: 8,356,222 →
Application: 12/718,822 →
Publication: US 2010/0229055
High Speed Clock Control
Patent: 8,448,008 →
Application: 12/749,093 →
Publication: US 2010/0251045
At-Speed Scan Testing with Controlled Switching Activity
Patent: 8,499,209 →
Application: 12/765,530 →
Publication: US 2010/0275077
Diagnostic Test Pattern Generation for Small Delay Defect
Patent: 8,527,232 →
Application: 12/768,592 →
Publication: US 2010/0274518
Method and System for Scan Chain Diagnosis
Patent: 8,689,070 →
Application: 12/781,695 →
Publication: US 2010/0293422
Nonsequential Hardware Design Synthesis Verification
Patent: 8,219,949 →
Application: 12/821,109 →
Publication: US 2011/0055779
Partition Response Surface Modeling
Patent: 8,572,525 →
Application: 12/861,777 →
Publication: US 2011/0047520
Method and System for Proximity-Aware Circuit Design
Patent: 8,281,270 →
Application: 12/870,559 →
Publication: US 2011/0055782
Retargeting Based on Process Window Simulation
Patent: 8,533,637 →
Application: 12/981,340 →
Publication: US 2011/0161895
Characteristic Response Extraction for Non-Linear Transmit Channels
Patent: 9,048,941 →
Application: 13/012,698 →
Publication: US 2011/0188562
Register Transfer Level Design Compilation Advisor
Patent: 8,516,411 →
Application: 13/017,929 →
Publication: US 2012/0180011
Circuit And Method For Simultaneously Measuring Multiple Changes In Delay
Patent: 8,489,947 →
Application: 13/018,002 →
Publication: US 2011/0202804
Low Power Compression of Incompatible Test Cubes
Patent: 8,832,512 →
Application: 13/049,829 →
Publication: US 2011/0231721
Device Control Call Allocation for Embedded System Design
Patent: 8,402,479 →
Application: 13/050,897 →
Publication: US 2011/0247010
Fast Pattern Matching
Patent: 8,326,018 →
Application: 13/068,838 →
Publication: US 2012/0191729
Test Access Mechanism for Diagnosis Based on Partitioining Scan Chains
Patent: 8,607,107 →
Application: 13/091,092 →
Publication: US 2011/0258504
Profiling-Based Scan Chain Diagnosis
Patent: 8,843,796 →
Application: 13/158,743 →
Publication: US 2011/0307751
Hardware Emulation Proxy for Hardware Software Co-Emulation
Patent: 8,954,312 →
Application: 13/159,378 →
Publication: US 2011/0307239
Hierarchical Finite State Machine Generation for Power State Behavior in an Electronic Design
Patent: 8,943,451 →
Application: 13/167,415 →
Publication: US 2012/0011481
Improper Voltage Level Detection in Emulation Systems
Patent: 9,384,107 →
Application: 13/292,027 →
Publication: US 2012/0203533
Canonical Signature Generation for Layout Design Data
Patent: 8,677,300 →
Application: 13/364,299 →
Publication: US 2013/0198712
Compound Hold-Time Fault Diagnosis
Patent: 8,862,956 →
Application: 13/397,594 →
Publication: US 2012/0210184
Two-Dimensional Scan Architecture
Patent: 9,222,978 →
Application: 13/416,912 →
Publication: US 2012/0233512
Test Generator For Low Power Built-In Self-Test
Patent: 8,683,280 →
Application: 13/451,527 →
Publication: US 2012/0272110
Root Cause Distribution Determination Based On Layout Aware Scan Diagnosis Results
Patent: 8,930,782 →
Application: 13/473,549 →
Publication: US 2012/0297264
Prediction Of Circuit Performance Variations Due To Device Mismatch
Patent: 9,087,167 →
Application: 13/546,962 →
Publication: US 2013/0018645
Validation of Circuit Definitions
Patent: 8,650,515 →
Application: 13/588,975 →
Publication: US 2013/0047133
Test Scheduling and Test Access in Test Compression Environment
Application: 13/635,683 →
Publication: US 2015/0285854
Method and System for Verification of Electrical Circuit Designs at Process, Voltage, and Temperature Corners
Patent: 8,612,908 →
Application: 13/671,124 →
Publication: US 2013/0117721
Dynamic Design Partitioning For Diagnosis
Patent: 9,336,107 →
Application: 13/680,447 →
Publication: US 2013/0145213
Delta Retiming in Logic Simulation
Patent: 9,727,668 →
Application: 13/731,604 →
Publication: US 2013/0275112
Biometric Markers in a Debugging Environment
Patent: 8,893,065 →
Application: 13/940,082 →
Publication: US 2014/0019924
Test Bench Hierarchy and Connectivity in a Debugging Environment
Patent: 8,782,581 →
Application: 13/941,234 →
Publication: US 2014/0019923
Dynamic Design Partitioning For Scan Chain Diagnosis
Patent: 9,244,125 →
Application: 14/063,166 →
Publication: US 2014/0164859
Voltage-Related Analysis of Layout Design Data
Patent: 9,262,574 →
Application: 14/133,541 →
Publication: US 2014/0189613
Trace Routing According to Freeform Sketches
Patent: 9,256,707 →
Application: 14/589,769 →
Publication: US 2015/0193572
Generalization Of Shot Definitions For Mask And Wafer Writing Tools
Patent: 9,448,481 →
Application: 14/848,187 →
Publication: US 2016/0133458
Controlling Real Time During Embedded System Development
Application: 15/284,096 →
Publication: US 2017/0185708
System, Method, and Computer Program Product for Conditionally Eliminating a Memory Read Request
Application: 15/632,234 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Apr 23, 2008
From: TERZIOGLU, ESIN; WINOGRAD, GIL I.
To: NOVELICS LLC
Reel/Frame 020846/0907 →
Assignment of Assignor's Interest Feb 5, 2009
From: MCCONAGHY, TRENT LORNE, MR.; DYCK, JEFF, MR.; SALLAM, SAMER, MR.; BREEN, KRIS, MR.
To: SOLIDO DESIGN AUTOMATION INC.
Reel/Frame 022212/0888 →
Assignment of Assignor's Interest May 21, 2009
From: MCCONAGHY, TRENT LORNE; DRENNAN, PAT; COOPER, JOEL; DYCK, JEFFREY
To: SOLIDO DESIGN AUTOMATION INC.
Reel/Frame 022723/0742 →
Assignment of Assignor's Interest Sep 14, 2009
From: KWOK, KA-KEI; LI, BING; LY, TAI AN; SABBAGH, ROJER RAJI
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 023228/0518 →
Assignment of Assignor's Interest May 21, 2010
From: RAJSKI, JANUSZ; MUKHERJEE, NILANJAN; KASSAB, MARK A.; RINDERKNECHT, THOMAS H.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024426/0456 →
Assignment of Assignor's Interest Jun 1, 2010
From: HUANG, YU; CHENG, WU-TUNG; GUO, RUIFENG; TAI, TING-PU
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0402 →
Assignment of Assignor's Interest Jun 1, 2010
From: MRUGALSKI, GRZEGORZ; MUKHERJEE, NILANJAN; RAJSKI, JANUSZ; CZYSZ, DARIUSZ
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0773 →
Assignment of Assignor's Interest Jun 1, 2010
From: MUKHERJEE, NILANJAN; POGIEL, ARTUR; RAJSKI, JANUSZ; TYSZER, JERZY
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0753 →
Assignment of Assignor's Interest Jun 1, 2010
From: GUO, RUIFENG; CHENG, WU-TUNG; KOBAYASHI, TAKEO; TSAI, KUN-HAN
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0746 →
Assignment of Assignor's Interest Jun 1, 2010
From: HAPKE, FRIEDRICH; WITTKE, MICHAEL; OCHSENKNECHT, SASCHA; RINDERKNECHT, THOMAS H
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0714 →
Assignment of Assignor's Interest Jun 1, 2010
From: RAJSKI, JANUSZ; MOGHADDAM, ELHAM K; MUKHERJEE, NILANJAN; KASSAB, MARK A
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024466/0525 →
Assignment of Assignor's Interest Aug 23, 2010
From: CHEW, MARKO P; YANG, YUE; ENDO, TOSHIKAZU
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 024874/0510 →
Assignment of Assignor's Interest Oct 7, 2010
From: PARIS, JAMES M.; HOGAN, WILLIAM M.; FERGUSON, JOHN G.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 025107/0298 →
Change of Name May 17, 2011
From: NOVELICS, LLC
To: NOVELICS CORPORATION
Reel/Frame 026293/0263 →
Assignment of Assignor's Interest May 19, 2011
From: NOVELICS CORPORATION
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026306/0510 →
Assignment of Assignor's Interest Jun 28, 2011
From: CONDON, ROBERT J.; BOWYER, BRYAN D.; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026515/0354 →
Assignment of Assignor's Interest Dec 21, 2011
From: MENTOR GRAPHICS CORPORATION
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 027428/0867 →
Assignment of Assignor's Interest May 29, 2012
From: MCCONAGHY, TRENT LORNE
To: SOLIDO DESIGN AUTOMATION INC.
Reel/Frame 028278/0263 →
Security Agreement Jun 18, 2012
From: SOLIDO DESIGN AUTOMATION INC.
To: COMERICA BANK
Reel/Frame 028397/0236 →
Assignment of Assignor's Interest Jun 28, 2013
From: GARG, BIKRAM; SEHGAL, RAJEEV; SINGH, AMARPAL
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 030712/0152 →
Assignment of Assignor's Interest Aug 19, 2016
From: BERGER, GABRIEL
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 039481/0552 →
Full Discharge of Security Interest Nov 28, 2017
From: COMERICA BANK
To: SOLIDO DESIGN AUTOMATION INC.
Reel/Frame 044837/0405 →
Merger and Change of Name May 7, 2018
From: SOLIDO DESIGN AUTOMATION INC.; MENTOR GRAPHICS (CANADA) LIMITED
To: MENTOR GRAPHICS (CANADA) LIMITED
Reel/Frame 045730/0583 →
Assignment of Assignor's Interest Dec 13, 2018
From: CALYPTO DESIGN SYSTEMS, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 047766/0077 →
Change of Name Jan 14, 2019
From: MENTOR GRAPHICS (CANADA) LIMITED
To: MENTOR GRAPHICS (CANADA) ULC
Reel/Frame 048071/0691 →