IP Library Assignment 047766/0077
Patent Assignment
Reel/Frame 047766/0077

Assignment of Assignor's Interest

Recorded: 2018-12-13 Pages: 3
Assignor
CALYPTO DESIGN SYSTEMS, INC.
Executed: 2015-09-30
Assignee
MENTOR GRAPHICS CORPORATION
8005 SW BOECKMAN ROAD, WILSONVILLE, OREGON, 97070-7777
Covered Properties (38)
Structured Algorithmic Programming Language Approach to System Design
Patent: 6,701,501 →
Application: 09/957,442 →
Publication: US 2002/0133788
Structured Algorithmic Programming Language Approach to System Design
Patent: 7,308,672 →
Application: 10/753,262 →
Publication: US 2004/0143801
Circuit Comparison by Information Loss Matching
Patent: 7,222,317 →
Application: 10/822,166 →
System, Method and Computer Program Product for Equivalence Checking Between Designs with Sequential Differences
Patent: 7,350,168 →
Application: 11/129,238 →
System, Method and Computer Program Product for Word-Level Numerical Computations and Storage
Patent: 7,333,032 →
Application: 11/335,928 →
System, Method and Computer Program Product for Timing-Independent Sequential Equivalence Verification
Patent: 7,607,115 →
Application: 11/538,751 →
System and Computer Program Product for Simultaneous Cell Identification/Technology Mapping
Patent: 7,539,956 →
Application: 11/601,272 →
System, Method and Computer Program Product for Word-Level Operator-to-Cell Mapping
Patent: 7,673,257 →
Application: 11/682,243 →
Integrated Circuit Design System, Method, and Computer Program Product That Takes into Account Observability Based Clock Gating Conditions
Patent: 7,761,827 →
Application: 11/832,425 →
Integrated Circuit Design System, Method, and Computer Program Product That Takes into Account the Stability of Various Design Signals
Patent: 7,966,593 →
Application: 11/832,443 →
Structured Algorithmic Programming Language Approach to System Design
Patent: 8,205,175 →
Application: 11/877,599 →
Publication: US 2008/0141227
Interactive Interface Resource Allocation in a Behavioral Synthesis Tool
Patent: 7,831,938 →
Application: 11/986,329 →
Publication: US 2008/0077906
System, Method, and Computer Program Product for Determining Equivalence of Netlists Utilizing at Least One Transformation
Patent: 8,122,401 →
Application: 12/260,837 →
System, Method, and Computer Program Product for Determining Equivalence of Netlists Utilizing Abstractions and Transformations
Patent: 8,117,571 →
Application: 12/260,851 →
Dynamic Pointer Dereferencing and Conversion to Static Hardware
Application: 12/274,168 →
Publication: US 2009/0132979
System, Method, and Computer Program Product for Altering a Hardware Description Based on an Instruction File
Patent: 8,667,434 →
Application: 12/478,658 →
System, Method, and Computer Program Product for Optimizing an Altered Hardware Design Utilizing Power Reports
Patent: 8,037,443 →
Application: 12/497,340 →
Distributed Pipeline Synthesis for High Level Electronic Design
Application: 12/690,811 →
Publication: US 2011/0179395
System, Method, and Computer Program Product for Reducing a Deactivation Function Utilizing an Optimal Reduction
Patent: 8,621,413 →
Application: 12/723,539 →
System, Method, and Computer Program Product for Conditionally Eliminating a Memory Read Request
Patent: 9,720,859 →
Application: 12/772,051 →
Nonsequential Hardware Design Synthesis Verification
Patent: 8,219,949 →
Application: 12/821,109 →
Publication: US 2011/0055779
Layered Modeling for High-Level Synthesis of Electronic Designs
Application: 12/834,874 →
Publication: US 2011/0035204
Flexible Power Query Interfaces and Infrastructures
Patent: 9,201,994 →
Application: 13/802,083 →
Formal Verification of Booth Multipliers
Patent: 9,384,167 →
Application: 14/019,365 →
Publication: US 2014/0067897
Modifying Code to Reduce Redundant or Unnecessary Power Usage
Application: 14/154,029 →
Formal Verification Using Microtransactions
Patent: 9,817,929 →
Application: 14/664,763 →
Flexible Power Query Interfaces and Infrastructures
Application: 14/951,293 →
System, Method, and Computer Program Product for Conditionally Eliminating a Memory Read Request
Application: 15/632,234 →
Formal Verification Using Microtransactions
Application: 15/809,892 →
Synchronous hardware description method
Application: 60/240,883 →
Techniques for rapid implementation of high-performance fpgas from algorithmic c specifications
Application: 60/257,923 →
Dynamic Pointer Dereferencing and Conversion to Static Hardware
Application: 60/989,092 →
Verification Of Hardware Synthesized From Non-Sequential Designs
Application: 61/219,287 →
SystemC Superset For High-Level Synthesis
Application: 61/224,470 →
Formal Verification of Booth Multipliers
Application: 61/696,928 →
Modifying Code to Reduce Redundant or Unnecessary Power Usage
Application: 61/751,266 →
Formal Verification Using Microtransactions
Application: 62/007,852 →
Formal Verification Using Microtransactions
Application: 62/042,207 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 18, 2002
From: WATERS, SIMON J.; GUTBERLET, PETER P.; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 012505/0532 →
Assignment of Assignor's Interest Apr 9, 2004
From: MATHUR, ANMOL; GOYAL, DEEPAK
To: CALYPTO DESIGN SYSTEMS
Reel/Frame 015213/0928 →
Assignment of Assignor's Interest May 12, 2005
From: MATHUR, ANMOL; SHARMA, NIKHIL; GOYAL, DEEPAK; HASTEER, GAGAN
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 016573/0023 →
Assignment of Assignor's Interest Jan 20, 2006
From: RAMACHANDRAN, VENKY; HALDAR, MALAY
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 017500/0170 →
Assignment of Assignor's Interest Oct 4, 2006
From: KRISHNASWAMY, VENKATRAM; YAMAMOTO, SHUSAKU; TATSUDA, JUNICHI
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 018371/0097 →
Assignment of Assignor's Interest Nov 16, 2006
From: XIE, AIGUO; ROY, SUMIT
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 018617/0221 →
Assignment of Assignor's Interest Nov 17, 2006
From: WATERS, SIMON JOSHUA; GUTBERLET, PETER PIUS; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 018554/0222 →
Assignment of Assignor's Interest Mar 5, 2007
From: BAINS, SHAIL; RANJAN, ABHISHEK; MATHUR, ANMOL; RAMACHANDRAN, VENKY
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 018970/0165 →
Assignment of Assignor's Interest Aug 1, 2007
From: RAMACHANDRAN, VENKY; TRIPATHI, NIKHIL; MATHUR, ANMOL; ROY, SUMIT
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 019647/0989 →
Assignment of Assignor's Interest Aug 1, 2007
From: RAMACHANDRAN, VENKY; TRIPATHI, NIKHIL; MATHUR, ANMOL; ROY, SUMIT
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 019647/0673 →
Assignment of Assignor's Interest Oct 25, 2007
From: WATERS, SIMON J.; GUTBERLET, PETER P.; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 020013/0872 →
Assignment of Assignor's Interest Oct 29, 2008
From: CHAUHAN, PANKAJ P.; GOYAL, DEEPAK; MATHUR, ANMOL
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 021760/0865 →
Assignment of Assignor's Interest Oct 29, 2008
From: CHAUHAN, PANKAJ P.; GOYAL, DEEPAK; MATHUR, ANMOL
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 021760/0839 →
Security Agreement Nov 3, 2008
From: CALYPTO DESIGN SYSTEMS, INC.
To: SILICON VALLEY BANK
Reel/Frame 021773/0206 →
Assignment of Assignor's Interest Dec 16, 2008
From: WATERS, SIMON JOSHUA; GUTBERLET, PETER PIUS
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 021989/0695 →
Assignment of Assignor's Interest Apr 15, 2009
From: BOWYER, BRYAN DARRELL; GUTBERLET, PETER PIUS; WATERS, SIMON JOSHUA
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 022548/0809 →
Assignment of Assignor's Interest Jun 4, 2009
From: KIM, VICTOR; DAS, NILOY; SINGH, RAGHVENDRA K.
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 022795/0971 →
Assignment of Assignor's Interest Jul 2, 2009
From: KRISHNASWAMY, VENKATRAM; GUPTA, VIPUL
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 022912/0707 →
Assignment of Assignor's Interest Mar 12, 2010
From: XIE, AIGUO
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 024078/0188 →
Assignment of Assignor's Interest Apr 30, 2010
From: TRIPATHI, NIKHIL; RAMACHANDRAN, VENKY; HALDAR, MALAY; ROY, SUMIT
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 024322/0322 →
Assignment of Assignor's Interest Oct 6, 2010
From: SMIRNOV, MAXIM; GUTBERLET, PETER
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 025102/0690 →
Assignment of Assignor's Interest Oct 25, 2010
From: SMIRNOV, MAXIM; TAKACH, ANDRES
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 025187/0987 →
Assignment of Assignor's Interest Jun 28, 2011
From: CONDON, ROBERT J.; BOWYER, BRYAN D.; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026515/0354 →
Assignment of Assignor's Interest Jun 28, 2011
From: SMIRNOV, MAXIM; GUTBERLET, PETER
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026515/0440 →
Release Aug 24, 2011
From: SILICON VALLEY BANK
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 026803/0962 →