IP Library Granted Patent US 7,308,672
Granted Patent B2
US 7,308,672 · App. 10/753,262 · Granted Dec 11, 2007

Structured algorithmic programming language approach to system design

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Quick Facts
Patent No.
US 7,308,672
App. No.
10/753,262
Granted
Dec 11, 2007
Kind
B2
Abstract

An algorithmic programming language approach to system design enables design, synthesis, and validation of structured, system-level specifications, and integrates system-level design into the rest of the design process. The algorithmic programming language design approach includes various techniques and tools, which can be used in combination or independently. For example, the design approach includes techniques and tools for simplifying specification of a design unit interface in a programming language specification and/or simplifying specification of synchronization and sub-design unit concurrency for a design unit. According to a first aspect of the design approach, design occurs at the algorithmic level of abstraction. According to a second aspect, the design approach leverages existing simulation technology for validation at various stages of the design flow. According to a third aspect, a design tool synthesizes a structured, programming language specification into a lower-level specification, such as a VHDL specification.

Claims (24)

1. A computer readable medium storing computer executable instructions for causing a computer system programmed thereby to perform a method of transforming a programming language specification into a lower-level specification, the method comprising:

accepting a programming language specification, the programming language specification including plural calls to plural instances of a unit class, wherein a first call of the plural calls maps to a first instance of the plural instances of the unit class, wherein a second call of the plural calls maps to a second instance of the plural instances of the unit class, and wherein the programming language specification lacks explicit concurrency modeling for the plural instances of the unit class; and

transforming the programming language specification into a lower-level specification, wherein the transforming includes generating lower-level description for handling concurrent execution of units represented by the plural instances of the unit class in the programming language specification.

2. The computer readable medium of claim 1 wherein the programming language specification also lacks synchronization modeling, and wherein the method further comprises generating lower-level description to model synchronization.

3. The computer readable medium of claim 1 wherein the method further comprises:

transforming an algorithmic method implementation of the programming language specification into a process of the lower-level specification.

4. The computer readable medium of claim 1 wherein the method further comprises:

transforming plural methods of an interface of the programming language specification into plural ports of a port map of the lower-level specification.

5. The computer readable medium of claim 1 wherein the programming language specification includes an object-oriented class description.

6. A file including the programming language specification of claim 1 .

7. A file including the lower-level specification of claim 1 .

8. A design tool comprising:

a design input module for accepting an algorithmic specification, the algorithmic specification including plural unit calls that map to plural different instances of a unit, thereby indicating parallel execution of the plural unit calls; and

a hardware description language transformer for transforming the algorithmic specification into a lower-level specification and outputting the lower-level specification, wherein the transformer adds code into the lower-level specification for handling the parallel execution of the plural unit calls.

9. The design tool of claim 8 further comprising:

an architecture exploration module for receiving the lower-level specification as input and presenting alternative architectures for the lower-level specification to a designer.

10. The design tool of claim 8 wherein the unit is a sub-design unit of a design unit, and wherein instantiation relationships in the algorithmic specification represent structural relationships within the design unit.

11. A file including the algorithmic specification of claim 8 .

12. A file including the lower-level specification of claim 8 .

13. In a computing environment, a computer-implemented method of transforming a programming language specification into a lower-level specification, the method comprising:

providing a programming language specification, the programming language specification including plural unit calls that map to plural different instances of a unit class, thereby indicating parallel execution of the plural unit calls; and

receiving a lower-level specification produced by transforming the programming language specification into the lower-level specification, wherein the transforming includes adding code into the lower-level specification for handling the parallel execution of the plural unit calls.

14. The method of claim 13 wherein the programming language specification is provided to one or more transformer modules, and wherein the lower-level specification is received from the one or more transformer modules.

15. The method of claim 13 wherein the computing environment is a distributed computing environment.

Assignments (4)
MERGER AND CHANGE OF NAME Recorded Jun 29, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056713/0076 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2018
From: CALYPTO DESIGN SYSTEMS, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 047766/0077 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2011
From: MENTOR GRAPHICS CORPORATION
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 027428/0867 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2006
From: WATERS, SIMON JOSHUA; GUTBERLET, PETER PIUS; TAKACH, ANDRES R.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 018554/0222 →