IP Library Granted Patent US 10,534,723
Granted Patent B1
US 10,534,723 · App. 15/632,234 · Granted Jan 14, 2020

System, method, and computer program product for conditionally eliminating a memory read request

Inventors: Nikhil Tripathi (Noida, IN); Venky Ramachandran (Cupertino, CA); Malay Haldar (Sunnyvale, CA); Sumit Roy (San Jose, CA); Anmol Mathur (San Jose, CA); Abhishek Roy (Noida, IN); Mohit Kumar (Noida, IN)
Assignee: Mentor Graphics Corporation
G06F12/14G11C7/1072G06F2212/1052
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Quick Facts
Patent No.
US 10,534,723
App. No.
15/632,234
Granted
Jan 14, 2020
Kind
B1
Abstract

A system, method and computer program product are provided for conditionally eliminating a memory read request. In use, a memory read request is identified. Additionally, it is determined whether the memory read request is an unnecessary memory read request. Further, the memory read request is conditionally eliminated, based on the determination.

Claims (31)

1. A computer program product embodied on a non-transitory computer readable medium, comprising:

computer code for identifying a memory read request;

computer code for determining whether the memory read request is an unnecessary memory read request because one or more results of the memory read request are not utilized within a predetermined period, thus allowing the memory read request to be eliminated without changing functionality of a hardware logic design; and

computer code for eliminating the memory read request, based on the determination, wherein eliminating the memory read request comprises preventing the memory read request from being executed.

2. The computer program product of claim 1 , wherein the memory read request is determined to be the unnecessary memory read request if an output of the memory remains unobservable from a clock cycle following the memory read request to a clock cycle of a subsequent read request.

3. The computer program product of claim 1 , wherein the computer program product is operable such that the memory read request is eliminated if it is determined that the memory read request is an unnecessary memory read request.

4. The computer program product of claim 3 , wherein the memory read request is eliminated by adding a condition that prevents the memory read request.

5. The computer program product of claim 1 , wherein determining whether the memory read request is the unnecessary memory read request includes extracting a condition of an output of the memory.

6. The computer program product of claim 5 , wherein determining whether the memory read request is the unnecessary memory read request further includes accelerating the extracted condition.

7. The computer program product of claim 6 , wherein eliminating the memory read request includes combining the accelerated condition with a memory enable of the memory.

8. A method, comprising:

with a computer processor:

identifying a memory read request from hardware logic;

determining whether the memory read request is unobservable to the hardware logic because one or more results of the memory read request are not utilized within a predetermined period, thus allowing the memory read request to be eliminated without changing functionality of the hardware logic; and

eliminating the memory read request, based on the determination, wherein eliminating the memory read request comprises preventing the memory read request from being executed.

9. The method of claim 8 , wherein the memory read request is eliminated if it is determined that the memory read request is an unnecessary memory read request.

10. The method of claim 8 , wherein the memory read request is determined to be the unnecessary memory read request if an output of the memory remains unobservable from a clock cycle following the memory read request to a clock cycle of a subsequent read request.

11. The method of claim 8 , wherein determining whether the memory read request is the unnecessary memory read request includes extracting a condition of an output of the memory.

12. The method of claim 11 , wherein determining whether the memory read request is the unnecessary memory read request further includes accelerating the extracted condition.

13. The method of claim 12 , wherein eliminating the memory read request includes combining the accelerated condition with a memory enable of the memory.

14. A system, comprising:

a computer comprising one or more processors and a memory, wherein the memory comprises executable instructions that, when executed by the one or more processors, cause the computer to perform operations, the operations comprising:

identify a memory read request from hardware logic;

determine whether the memory read request is unobservable to the hardware logic because one or more results of the memory read request are not utilized within a predetermined period, thus allowing the memory read request to be eliminated without changing functionality of the hardware logic; and

eliminate the memory read request, based on the determination, comprising preventing the memory read request from being executed.

15. The system of claim 14 , wherein the memory read request is eliminated if it is determined that the memory read request is an unnecessary memory read request.

16. The system of claim 14 , wherein the memory read request is eliminated by adding a condition that prevents the memory read request.

17. The system of claim 14 , wherein the memory read request is determined to be the unnecessary memory read request if an output of the memory remains unobservable from a clock cycle following the memory read request to a clock cycle of a subsequent read request.

18. The computer program product of claim 14 , wherein determining whether the memory read request is the unnecessary memory read request includes extracting a condition of an output of the memory.

19. The system of claim 18 , wherein determining whether the memory read request is the unnecessary memory read request further includes accelerating the extracted condition.

20. The system of claim 19 , wherein eliminating the memory read request includes combining the accelerated condition with a memory enable of the memory.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Jun 9, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056526/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2019
From: TRIPATHI, NIKHIL; RAMACHANDRAN, VENKY; HALDAR, MALAY; ROY, SUMIT; MATHUR, ANMOL; ROY, ABHISHEK; KUMAR, MOHIT
To: CALYPTO DESIGN SYSTEMS, INC.
Reel/Frame 048168/0721 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2018
From: CALYPTO DESIGN SYSTEMS, INC.
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 047766/0077 →
Continuity (1)
Division 12772051 · Apr 30, 2010