LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

1 . A liquid crystal display (LCD) device comprising:

a substrate comprising:

a gate line;

a data line; and

a thin film transistor at a crossing region of the gate line and the data line, wherein the gate line and the data line define a pixel region;

a pixel electrode;

a common electrode separated from the pixel electrode, wherein the pixel electrode and the common electrode are alternately arranged in the pixel region; and

an alignment layer on the pixel electrode and the common electrode, between the pixel electrode and the common electrode, and in a region adjacent to the pixel electrode, wherein the alignment layer has an upper surface having a substantially uniform height.

2 . The LCD device of claim 1 , wherein portions of the alignment layer between the pixel electrode and the common electrode and in the region adjacent to the pixel electrode is thicker than a portion of the alignment layer on the pixel electrode and the common electrode.

3 . The LCD device of claim 1 , wherein a value equal to a sum of a thickness of the pixel electrode or the common electrode and a thickness of a portion of the alignment layer on the pixel electrode and the common electrode is substantially the same as a thickness of portions of the alignment layer between the pixel electrode and the common electrode and in the region adjacent to the pixel electrode.

4 . The LCD device of claim 1 , wherein the alignment layer comprises:

a first alignment layer comprising separated grooves; and

a second alignment layer on the first alignment layer and the pixel electrode and the common electrode, wherein the pixel electrode and the common electrode are alternately placed in the grooves.

5 . The LCD device of claim 4 , wherein the first alignment layer has a thickness substantially the same as the pixel electrode and the common electrode.

6 . A manufacturing method of a liquid crystal display (LCD) device, the manufacturing method comprising:

preparing a substrate comprising:

a gate line;

a data line; and

a thin film transistor at a crossing region of the gate line and data line, wherein the gate line and the data line define a pixel region;

forming a pixel electrode and a common electrode t hat are separated and alternately arranged in the pixel region; and

forming an alignment layer on the pixel electrode and the common electrode, between the pixel electrode and the common electrode, and in a region adjacent to the pixel electrode, wherein the alignment layer has an upper surface having a substantially uniform height.

7 . The manufacturing method of claim 6 , wherein the forming of the alignment layer comprises:

forming an initial alignment layer on the pixel electrode and the common electrode; and

planarizing the initial alignment layer.

8 . The manufacturing method of claim 7 , wherein the planarizing the initial alignment layer comprises planarizing through exposure or etching.

9 . The manufacturing method of claim 8 , wherein:

the exposure uses an exposure mask comprising:

a transmission region for transmitting light; and

a light shielding region for shielding light;

the transmission region corresponds to a convex part of the initial alignment layer; and

the light shielding region corresponds to a concave part of the initial alignment layer.

10 . The manufacturing method of claim 8 , wherein the etching is performed using an etchback process.

11 . The manufacturing method of claim 6 , wherein the forming of the alignment layer comprises:

forming a first alignment layer on the pixel electrode and the common electrode;

planarizing the first alignment layer until the pixel electrode and the common electrode are exposed; and

forming a second alignment layer on the exposed pixel electrode, the exposed common electrode, and the first alignment layer between the exposed pixel electrode and the exposed common electrode.

12 . The manufacturing method of claim 11 , wherein the planarizing the first alignment layer comprises planarizing using exposure or etching.

13 . The manufacturing method of claim 12 , wherein:

the exposure uses an exposure mask comprising:

a transmission region for transmitting light; and

one of a light shielding region for shielding light, or a semi-transmission region for partially transmitting light;

the transmission region corresponds to a convex part of the first alignment layer, and

the one of the light shielding region or the semi-transmission region correspond to a concave part of the first alignment layer.

14 . The manufacturing method of claim 12 , wherein the etching is performed using an etchback process.

15 . A manufacturing method of a liquid crystal display (LCD) device, the manufacturing method comprising:

preparing a substrate which comprises:

a gate line;

a data line; and

a thin film transistor at a crossing region of the gate line and the data line defining a pixel region;

forming a first alignment layer on the substrate of the pixel region, the first alignment layer comprising separated grooves;

forming a pixel electrode and a common electrode alternately in the grooves;

planarizing the pixel electrode, the common electrode, and the first alignment layer; and

forming a second alignment layer on the planarized pixel electrode, the planarized common electrode, and the planarized first alignment layer.

16 . The manufacturing method of claim 15 , wherein the grooves are formed through exposure or etching, and have a depth that is substantially the same as a thickness of the first alignment layer.

17 . The manufacturing method of claim 15 , wherein the pixel electrode and the common electrode have a thickness that is substantially the same as a thickness of the first alignment layer.