IP Library Granted Patent US 8,775,894
Granted Patent B1
US 8,775,894 · App. 13/168,095 · Granted Jul 8, 2014

Lane specific CRC

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Quick Facts
Patent No.
US 8,775,894
App. No.
13/168,095
Granted
Jul 8, 2014
Kind
B1
Abstract

A method of data validation is provided. In one implementation, the method includes performing a cyclic redundancy check (CRC) on data transmitted over a channel having L lanes. In one implementation, the performing includes performing the CRC using n CRC bits and a CRC polynomial, where n is an integer equal to or greater than one and where L is an integer equal to or greater than one and represents the number of lanes in the channel. Further, in one implementation, the CRC polynomial is selected based on L. In one implementation, the method includes: performing a CRC on data, where the performing includes performing the CRC using n CRC bits, where n is an integer equal to or greater than one; and performing a checksum on the data, where the performing the checksum includes performing the checksum using m checksum bits, where m is an integer equal to or greater than one, where n plus m bits are allocated for validating the data. In one implementation, the performing the CRC and the performing the checksum are implemented by a hardware device.

Claims (25)

1. A method comprising:

performing a cyclic redundancy check (CRC) on data transmitted over a channel having L lanes, wherein the performing includes performing the CRC using n CRC bits and a CRC polynomial, wherein n is an integer equal to or greater than one, wherein L is an integer equal to or greater than one and represents number of lanes in the channel, wherein the CRC polynomial is selected based on L, and wherein the performing is implemented by a hardware device.

2. The method of claim 1 , wherein the CRC polynomial is also selected based on word size of words in which the data is transmitted.

3. The method of claim 1 , wherein the CRC polynomial is also selected based on whether the CRC is calculated, within a given word, most significant bit (MSB) to least significant bit (LSB) or LSB to MSB.

4. The method of claim 1 , wherein the CRC polynomial is also selected based on whether the CRC is calculated on a lane that may have error replication.

5. The method of claim 1 , wherein the CRC polynomial is also selected based on frame size of frames in which the data is transmitted.

6. The method of claim 1 further comprising selecting the CRC polynomial based on L.

7. The method of claim 6 , wherein the selecting is further based on word size of words in which the data is transmitted.

8. The method of claim 7 , wherein the selecting is further based on frame size of frames in which the data is transmitted.

9. The method of claim 1 , wherein the hardware device is a dedicated hardware device or a computer.

10. A non-transitory computer-readable medium including a computer program, which, when executed on a computer, causes the computer to implement a method comprising:

performing a cyclic redundancy check (CRC) on data transmitted over a channel having L lanes, wherein the performing includes performing the CRC using n CRC bits and a CRC polynomial, wherein n is an integer equal to or greater than one, wherein L is an integer equal to or greater than one and represents number of lanes in the channel, and wherein the CRC polynomial is selected based on L.

11. The non-transitory computer-readable medium of claim 10 , wherein the CRC polynomial is also selected based on word size of words in which the data is transmitted.

12. The non-transitory computer-readable medium of claim 10 , wherein the CRC polynomial is also selected based on frame size of frames in which the data is transmitted.

13. The non-transitory computer-readable medium of claim 10 , wherein the method further comprises selecting the CRC polynomial based on L.

14. A method comprising:

performing a cyclic redundancy check (CRC) on data, wherein the performing includes performing the CRC using n CRC bits, wherein n is an integer equal to or greater than one; and

performing a checksum on the data, wherein the performing the checksum includes performing the checksum using m checksum bits, wherein m is an integer equal to or greater than one,

wherein n plus m bits are allocated for validating the data and wherein the performing the CRC and the performing the checksum are implemented by a hardware device.

15. The method of claim 14 , wherein the performing the CRC and the performing the checksum are performed in parallel.

16. The method of claim 14 , wherein the performing the CRC and the performing the checksum are performed in series.

17. The method of claim 14 , wherein n and m are selected based on results of simulation.

18. The method of claim 14 , wherein the data is a data packet in a data frame, wherein the data frame has m plus n bits allocated for data validation.

19. The method of claim 14 further comprising selecting n and m.

20. The method of claim 14 , wherein the hardware device is a dedicated hardware device or a computer.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2011
From: MENDEL, DAVID W.; BAECKLER, GREGG WILLIAM
To: ALTERA CORPORATION
Reel/Frame 026495/0091 →