IP Library Granted Patent US 8,115,266
Granted Patent B2
US 8,115,266 · App. 13/170,628 · Granted Feb 14, 2012

MEMS device having a movable electrode

Assignee: Seiko Epson Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,115,266
App. No.
13/170,628
Granted
Feb 14, 2012
Kind
B2
Abstract

A microelectromechanical system (MEMS) device includes a semiconductor substrate, a MEMS including a fixed electrode and a movable electrode formed on the semiconductor substrate through an insulating layer, and a well formed in the semiconductor substrate below the fixed electrode. The well is one of an n-type well and a p-type well. The p-type well applies a positive voltage to the fixed electrode while the n-type well applies a negative voltage to the fixed electrode.

Claims (9)

1. A device, comprising:

a semiconductor substrate;

a MEMS including a fixed electrode and a movable electrode formed on an insulating layer that is formed on the semiconductor substrate;

a well formed on the semiconductor substrate below the fixed electrode, the well having a same polarity as a polarity of the semiconductor substrate;

an isolation well having an opposite polarity to the polarity of the well and surrounding the well in the semiconductor substrate, wherein the well and the isolation well are in a reverse bias state, while the isolation well and the semiconductor substrate are in a reverse bias state; and

a circuit.

2. The device according to claim 1 , satisfying Vp>0, and 0<Vp−Vwell<Vth, where Vp is a bias voltage of the MEMS, Vwell is a voltage applied to the well below the MEMS, Vth is a threshold voltage at which an inversion layer is formed in the well, wherein the semiconductor substrate is a p-type substrate and the well is a p-type well, while the isolation well is an n-type well.

3. The device according to claim 1 , satisfying Vp<0, and 0<Vp−Vwell<Vth, where Vp is a bias voltage of the MEMS, Vwell is a voltage applied to the well below the MEMS, Vth is a threshold voltage at which an inversion layer is formed in the well, wherein the semiconductor substrate is an n-type substrate and the well is an n-type well, while the isolation well is a p-type well.

4. The device according to claim 1 , wherein the circuit is an integrated circuit (IC).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050197/0212 →
Priority Claims (2)
JP 2006-289063 · Oct 24, 2006 · national
JP 2007-184020 · Jul 13, 2007 · national
Continuity (4)
Continuation 12981747 · Dec 30, 2010
Continuation 12710773 · Feb 23, 2010
Continuation 11876107 · Oct 22, 2007
Related Publication 20110254110A1 · Oct 20, 2011