Methods of manufacturing CMOS transistor
View Patent ↗A method of manufacturing a CMOS transistor can be provided by forming first and second gate electrodes on a substrate and forming a gate insulation layer on the first and second gate electrodes. A semiconductor channel material having a first conductivity type can be formed on the gate insulation layer. A pair of ohmic contacts can be formed on the semiconductor channel material such that the ohmic contacts cross over both side portions of the first gate electrode, respectively. A pair of Schottky contacts can be formed on the semiconductor channel material such that the Schottky contacts cross over both side portions of the second gate electrode, respectively.
1. A method of manufacturing a CMOS transistor, the method comprising:
forming first and second gate electrodes on a substrate;
forming a gate insulation layer on the first and second gate electrodes;
forming a semiconductor channel material having a first conductivity type on the gate insulation layer;
forming a pair of ohmic contacts on the semiconductor channel material such that the ohmic contacts cross over both side portions of the first gate electrode, respectively; and
forming a pair of Schottky contacts on the semiconductor channel material such that the Schottky contacts cross over both side portions of the second gate electrode, respectively.
2. The method of claim 1 , wherein the semiconductor channel material is formed on the gate insulation layer by printing an n-type semiconductor material.
3. The method of claim 2 , wherein the ohmic contact is formed on the semiconductor channel material by depositing a material having a work function less than that of the semiconductor channel material onto the semiconductor channel material in a first area of the substrate in a printing process.
4. The method of claim 2 , wherein the Schottky contact is formed on the semiconductor channel material by depositing a material having a work function greater than that of the semiconductor channel material onto the semiconductor channel material in a second area of the substrate in a printing process.
5. The method of claim 1 , wherein the semiconductor channel material is formed on the gate insulation layer by printing a p-type semiconductor material.
6. The method of claim 5 , wherein the ohmic contact is formed on the semiconductor channel material by depositing a material having a work function less than that of the semiconductor channel material onto the semiconductor channel material in a first area of the substrate in a printing process.
7. The method of claim 5 , wherein the Schottky contact is formed on the semiconductor channel material by depositing a material having a work function greater than that of the semiconductor channel material onto the semiconductor channel material in a second area of the substrate in a printing process.
8. The method of claim 1 , wherein the semiconductor channel material comprises a semiconductor material having one of a nano-wire structure, a nano-tube structure and a nano-ribbon structure.
9. The method of claim 1 , further comprising:
forming a first wiring electrically connecting the first and second gate electrodes with each other; and
forming a second wiring electrically connecting one of the ohmic contacts and one of the Schottky contacts with each other.
10. A method of manufacturing a CMOS transistor, the method comprising:
forming a semiconductor channel material having a first conductivity type on a substrate;
forming a gate insulation layer on the semiconductor channel material;
forming first and second gate electrodes on the gate insulation layer;
forming a pair of ohmic contacts to make contact with the semiconductor channel material and to cross over both side portions of the first gate electrode, respectively; and
forming a pair of Schottky contacts to make contact with the semiconductor channel material and to cross over both side portions of the second gate electrode, respectively.