Patent Assignment
Reel/Frame 064444/0863
License
Recorded: 2023-06-23
Pages: 8
Assignor
SAMSUNG ELECTRONICS CO., LTD.
Executed: 2023-06-21
Assignee
INTELLECTUAL KEYSTONE TECHNOLOGY LLC
2711 CENTERVILLE ROAD, SUITE 400, CITY OF WILMINGTON, COUNTY OF NEW CASTLE, DELAWARE, 19808
Covered Properties
(96)
Data Transmission System with Reduced Power Consumption
Fin Fet and Method of Fabricating Same
Metal Wiring of Semiconductor Device and Method of Fabricating the Same
Memory Device Performance Enhancement Through Pre-Erase Mechanism
Fin Fet and Method of Fabricating Same
Electronic Fuse Having Heat Spreading Structure
Method of Forming a Contact Structure
Cmos Transistor and Method of Manufacturing the Same
Semiconductor Device and Method of Forming the Same
Fin Fet and Method of Fabricating Same
Method of Fabricating Schottky Barrier Transistor
Method of Fabricating Nonvolatile Memory Device
Variable Resistance Non-Volatile Memory Cells and Methods of Fabricating Same
Embedded Semiconductor Device Including Planarization Resistance Patterns and Method of Manufacturing the Same
Methods of Forming Integrated Circuit Capacitors Having Sidewall Supports and Capacitors Formed Thereby
Non-Volatile Memory Device Having Bottom Electrode
Methods of Manufacturing Cmos Transistor
Fin Fet and Method of Fabricating Same
Nonvolatile Memory Device with 3D Memory Cell Array
Non-Volatile Memory Device with High Speed Operation and Lower Power Consumption
Fin Fet and Method of Fabricating Same
Transistors and Methods of Manufacturing the Same
Secondary Memory Units and Systems Including the Same
Semiconductor Device and Method for Forming the Same
Nonvolatile Memory Device and Method of Programming the Same
Output Driver, Devices Having the Same, and Ground Termination
Semiconductor Memory Devices Having Internal Clock Signals and Memory Systems Including Such Memory Devices
Method of programming a 3-dimensional nonvolatile memory device based on a program order of a selected page and a location of a string selection line
Semiconductor Device Having High-K Gate Insulation Films Including Lanthanum
Semiconductor Device Having Silicide on Gate Sidewalls in Isolation Regions
EMBEDDED MULTIMEDIA CARD (eMMC), HOST CONTROLLING eMMC, AND METHOD OPERATING eMMC SYSTEM
Embedded Multimedia Card (Emmc), Host for Controlling the Emmc, and Methods of Operating the Emmc and the Host
Methods of Forming Hole Patterns of Semiconductor Devices
Methods of Fabricating Semiconductor Devices Including Fin-Shaped Active Regions
Memory Devices and Methods of Manufacturing the Same
Nonvolatile Memory Device Maintaining a Bitline Precharge During Program Verification Periods for Multi-Level Memory Cells and Related Programming Method
Semiconductor Device and Fabricating Method Thereof
Semiconductor Device and Method of Fabricating the Same
Methods of Fabricating a Semiconductor Device Using Voids in a Sacrificial Layer
Semiconductor Memory Devices Including Redundancy Memory Cells
Electronic Systems Including Heterogeneous Multi-Core Processors and Methods of Operating Same
Semiconductor Device Having Silicide on Gate Sidewalls in Isolation Regions
Semiconductor Devices
Embedded Multimedia Card and Method of Operating the Same
Semiconductor Device and Method for Fabricating the Same
Semiconductor Device and Fabricating Method Thereof
Patent:
9,318,478 →
Application:
14/610,046 →
Semiconductor Devices Including a Dummy Gate Structure on a Fin
Fin Fet and Method of Fabricating Same
Semiconductor Devices Having Nonlinear Bitline Structures
Apparatus and Methods for Substrate Processing and Manufacturing Integrated Circuit Devices
Method of Fabricating Semiconductor Device Having High-K Gate Insulation Films Including Work Function Adjusting Material
Methods for Fabricating Semiconductor Devices with Wet Etching
Patent:
9,337,105 →
Application:
14/732,884 →
Semiconductor Device and Method of Manufacturing the Same
Isolation Region Fabrication for Replacement Gate Processing
Patent:
46,303 →
Application:
14/872,790 →
Fin Fet and Method of Fabricating Same
Method for Detecting Overlay Error and Method for Manufacturing Semiconductor Device Using the Same
Isolation Region Fabrication for Replacement Gate Processing
Patent:
46,448 →
Application:
15/015,546 →
Semiconductor Device
Semiconductor Devices Including a Dummy Gate Structure on a Fin
Methods of Fabricating Semiconductor Devices Including Fin-Shaped Active Regions
Semiconductor Device and Method for Fabricating the Same
Semiconductor Memory Devices Including Redundancy Memory Cells
Semiconductor Device Including a Semiconductor Extension Layer Between Active Regions
Semiconductor Device Having Interconnection Structure
Semiconductor Device and Method of Manufacturing the Same
Integrated Circuit Devices Having Through-Silicon Via Structures and Methods of Manufacturing the Same
Three-Dimensional Semiconductor Device
Memory Device, Memory System, Method of Operating Memory Device, and Method of Operating Memory System
Semiconductor Devices
Semiconductor Devices Including a Dummy Gate Structure on a Fin
Semiconductor Memory Devices Including Redundancy Memory Cells
Semiconductor Device and Method for Manufacturing the Same
Memory Device Capable of Adjusting Operation Voltage and Application Processor for Controlling the Memory Device
Semiconductor Device Having a Device Isolation Layer
Output Driver, Devices Having the Same, and Ground Termination
Patent:
47,312 →
Application:
15/486,581 →
Semiconductor Devices Having Nonlinear Bitline Structures
Fin Fet and Method of Fabricating Same
Semiconductor Devices
Isolation Region Fabrication for Replacement Gate Processing
Patent:
48,616 →
Application:
15/626,876 →
Semiconductor Devices Including Separate Doped Regions
Methods of Fabricating Semiconductor Devices Including Fin-Shaped Active Regions
Semiconductor Device and Method of Manufacturing the Same
Method of Forming Fine Patterns of a Semiconductor Device
Semiconductor Devices Including a Dummy Gate Structure on a Fin
Semiconductor Devices
Semiconductor Device Having Interconnection Structure
Methods of Fabricating Semiconductor Devices Including Fin-Shaped Active Regions
Memory Device, Memory System, Method of Operating Memory Device, and Method of Operating Memory System
Method and System of Measuring Semiconductor Device and Method of Fabricating Semiconductor Device Using the Same
Semiconductor Devices Including a Dummy Gate Structure on a Fin
Semiconductor Devices Having Nonlinear Bitline Structures
Semiconductor Devices and Methods of Fabricating the Same
Semicondcutor Device Including a Semiconductor Extension Layer Between Active Regions
Semiconductor Device Having Interconnection Structure
Semiconductor Device Having Interconnection Structure
Semiconductor Devices Having Nonlinear Bitline Structures
Related Assignments
(6)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 20, 2009
From: PARK, SANG-SU; OH, JAEHEE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023550/0341 →
Assignment of Assignor's Interest
Jan 12, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023768/0001 →
Assignment of Assignor's Interest
Jan 13, 2010
From: LEE, HYOSAN; YOON, BOUN; LEE, KUNTACK; KIM, DONGHYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023841/0597 →
Assignment of Assignor's Interest
Apr 30, 2014
From: MEMORY TECHNOLOGIES LLC
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 032788/0560 →
Assignment of Assignor's Interest
May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
Assignment of Assignor's Interest
Oct 5, 2015
From: INFINEON TECHNOLOGIES AG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 036776/0905 →