IP Library Granted Patent US 8,553,683
Granted Patent B2
US 8,553,683 · App. 13/176,350 · Granted Oct 8, 2013

Three dimensional fat tree networks

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Quick Facts
Patent No.
US 8,553,683
App. No.
13/176,350
Granted
Oct 8, 2013
Kind
B2
Abstract

In a first embodiment of the present invention, a non-blocking switch fabric is provided comprising: a first set of intra-domain switches; a second set of intra-domain switches; a set of inter-domain switches located centrally between the first set of intra-domain switches and the second set of intra-domain switches, wherein each of the ports of each of the inter-domain switches is connected to an intra-domain switch from the first or second set of intra-domain switches.

Claims (32)

1. A method for operating an intra-domain switch in a first set of intra-domain switches in a non-blocking switch fabric having the first set of intra-domain switches, a second set of intra-domain switches, and a set of inter-domain switches located between the first set of intra-domain switches and the second set of intra-domain switches, the method comprising:

at an outside edge port of the intra-domain switch, inserting, in a packet that must travel between domains, an inter-domain routing prefix identifying both the source and destination domains; and

passing the packet that must travel between domains to one of the inter-domain switches via an inside edge port of the intra-domain switch, the method further comprising:

classifying an incoming packet as an ordered packet or an unordered packet;

for an ordered packet, forwarding the incoming packet to a port identified by a spread routing table using a hash of source and destination identifications as a table index; and

for an unordered packet, forwarding the incoming packet to a currently least utilized port, that leads to a root of the non-blocking switch fabric, having a smallest accumulator value, wherein an accumulator value for a port is increased by a value proportional to a length of each packet being forwarded to that port.

2. The method of claim 1 , further comprising:

determining if the packet is a read request or other non-posted request;

when the packet is a read request or other non-posted request, saving a source domain identification from a prefix of the packet for use in creating a prefix to return route an eventual returning completion for the packet.

3. The method of claim 2 , further comprising:

at the outside edge port of the intra-domain switch, removing, from a packet received via an intra-domain switch, an inter-domain routing prefix identifying both source and destination domains and saving the source domain to be used to route a response packet back to the original source port.

4. The method of claim 2 , wherein the inserting is performed by non-transparent bridge logic functionality.

5. The method of claim 2 , wherein the inserting is performed by a direct memory access (DMA) controller or other form of message passing engine.

6. The method of claim 1 , wherein an unordered packet includes a completion packet.

7. The method of claim 2 , further comprising:

when a fault is known to be present in a destination domain, performing a route exception lookup in a route exception lookup table at each step leading towards a root of a switch fabric defined by the first set of intra-domain switches, second set of intra-domain switches, and set of inter-domain switches; and

prohibiting the packet from being forwarded to a destination port identified in the route exception lookup table.

8. The method of claim 7 , wherein the fault is known to be present by detecting a tag in the packet having a bit that indicates that the destination domain has a fault.

9. The method of claim 7 , wherein inside edge switches of each source domain are configured with status bits for each egress port connecting to an inter-domain switch, and wherein if the inter-domain switch or the links to it contain a fault, a route exception lookup is performed using the destination domain.

10. The method of claim 9 , wherein if a route exception is indicated by the lookup, then for ordered traffic, a next higher numbered port with good status is selected, and for unordered traffic, all ports with bad status are excluded from deficit round robin route choices.

11. A non-transitory program storage device readable by a machine tangibly embodying a program of instructions executable by the machine to perform a method for operating an intra-domain switch in a first set of intra-domain switches in a non-blocking switch fabric having the first set of intra-domain switches, a second set of intra-domain switches, and a set of inter-domain switches located between the first set of intra-domain switches and the second set of intra-domain switches, the method comprising:

at an outside edge port of the intra-domain switch, inserting, in a packet that must travel between domains, an inter-domain routing prefix identifying both a source and a destination domain; and

passing the packet that must travel between domains to one of the inter-domain switches via an inside edge port of the intra-domain switch, the method including:

classifying an incoming packet as an ordered packet or an unordered packet;

for an ordered packet, forwarding the incoming packet to a port identified by a spread routing table using a hash of source and destination identifications as a table index; and

for an unordered packet, forwarding the incoming packet to a currently least utilized port, that leads to a root of the non-blocking switch fabric, having a smallest accumulator value, wherein an accumulator value for a port is increased by a value proportional to a length of each packet being forwarded to that port.

12. An apparatus operating an intra-domain switch in a first set of intra-domain switches in a non-blocking switch fabric having the first set of intra-domain switches, a second set of intra-domain switches, and a set of inter-domain switches located between the first set of intra-domain switches and the second set of intra-domain switches, the apparatus comprising:

means for, at an outside edge port of the intra-domain switch, inserting, in a packet that must travel between domains, an inter-domain routing prefix identifying both source destination domains;

means for passing the packet that must travel between domains to one of the intra-domain switches via an inside edge port of the intra-domain switch,

means for classifying an incoming packet as an ordered packet or an unordered packet;

for an ordered packet, forwarding the incoming packet to a port identified by a spread routing table using a hash of source and destination identifications as a table index; and

for an unordered packet, forwarding the incoming packet to a currently least utilized port, that leads to a root of the non-blocking switch fabric, having a smallest accumulator value, wherein an accumulator value for a port is increased by a value proportional to a length of each packet being forwarded to that port.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
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TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 034069-0494) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: PLX TECHNOLOGY, INC.
Reel/Frame 037682/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2015
From: PLX TECHNOLOGY, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
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PATENT SECURITY AGREEMENT Recorded Oct 28, 2014
From: PLX TECHNOLOGY, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 034069/0494 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2011
From: REGULA, JACK
To: PLX TECHNOLOGY, INC.
Reel/Frame 026543/0485 →