IP Library › Granted Patent US 8,816,772
Granted Patent B2
US 8,816,772 · App. 13/180,752 · Granted Aug 26, 2014

Differential amplifier with function of variable gain and optical receiver implemented with the same

Inventors: Yoshiyuki Sugimoto (Yokohama, JP); Sosaku Sawada (Yokohama, JP); Taizo Tatsumi (Yokohama, JP)
Assignee: Sumitomo Electric Industries, Ltd.
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Quick Facts
Patent No.
US 8,816,772
App. No.
13/180,752
Granted
Aug 26, 2014
Kind
B2
Abstract

A differential circuit with a function of a variable gain without shifting the output cross point is disclosed. The differential circuit includes an amplifying stage and a control stage. The amplifying stage includes three units each having a pair of transistors, a pair of load resistors, and a pair of current sources. The second and third units each put between the first unit and the load resistor to bypass the current. The control stage includes two units and two current sources to compensate the current bypassed by the second or third unit to keep the DC output level substantially in constant.

Claims (24)

1. A differential circuit, comprising:

an amplifying stage including first to third units, a pair of load resistors, a current source, and a power supply; and

a control stage including fourth and fifth units,

wherein one of said load resistors, said second unit, said first unit, and said current source constitute a first current path between said power supply and a ground, and another of said load resistors, said third unit, said first unit, and said current source constitute a second current path between said power supply and said ground,

wherein said second and third units each reduce a first current flowing in said first path and a second current flowing in said second path, respectively,

wherein said fourth unit is connected to said second unit and said one of said load resistors to compensate said first current reduced by said second unit, and said fifth unit is connected to said third unit and said other load resistor to compensate said second current reduced by said third unit and,

wherein said second and third units receive a control signal, and said fourth and fifth units receive a complementary control signal compementary to said control signal, said control signal determining reduction of said first and second currents by second and third units, respectively, said complementary control signal determining compensation of said first and second currents by said fourth and fifth units, respectively.

2. The differential circuit of claim 1 ,

wherein each of said first, fourth and fifth units includes a pair of transistors and a current source connected to said transistors, and

wherein said current source of said fourth unit and said current source of said fifth unit generate a current that is half of a current generated by said current source of said first unit.

3. The differential circuit of claim 1 ,

wherein said first and second currents reduced by said second and third units, respectively, and compensated by said fourth and fifth units, respectively, determine a gain of said differential circuit.

4. The differential circuit of claim 1 ,

wherein said first unit includes a pair of transistors that receive AC signals complementary to each other, and

wherein said first current reduced by said second unit and said second current reduced by said third unit determine a gain for said AC signals, and said first current compensated by said fourth unit and said second current compensated by said fifth unit keep a DC level of said differential circuit.

5. A differential circuit comprising:

an amplifying stage including first to third units, pair of load resistors, current sources, and a power supply; and

a control stage including fourth and fifth units,

wherein one of said load resistors, said second unit said first unit, and one of said current sources constitute a first current path between said power supply and a ground, and another of said load resistors, said third unit, said first unit, and another of said current sources constitute a second current path between said power supply and said ground,

wherein said second and third units each reduce a first current flowing in said first path and a second current flowing in said second path, respectively,

wherein said fourth unit is connected to said second unit and said one of said load resistors to compensate said first current reduced by said second unit, and said fifth unit is connected to said third unit and said other load resistor to compensate said second current reduced by said third unit, and

wherein said first unit includes a pair of transistors each grounded through respective of said current sources that are coupled with a resistor that determines a maximum gain of said differential amplifier.

6. The differential circuit of claim 5 ,

wherein said control stage includes current sources which each generate a current substantially equal to a current generated by each of said current sources of said amplifying stage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2011
From: SUGIMOTO, YOSHIYUKI; SAWADA, SOSAKU; TATSUMI, TAIZO
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 026879/0037 →
Priority Claims (1)
JP 2010-163005 · Jul 20, 2010 · national
Continuity (1)
Related Publication 20120018622A1 · Jan 26, 2012