IP Library Granted Patent US 8,639,895
Granted Patent B2
US 8,639,895 · App. 13/182,734 · Granted Jan 28, 2014

Systems and methods for memory region descriptor attribute override

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Quick Facts
Patent No.
US 8,639,895
App. No.
13/182,734
Granted
Jan 28, 2014
Kind
B2
Abstract

A memory protection unit (MPU) is configured to store a plurality of region descriptor entries, each region descriptor entry defining an address region of a memory, an attribute corresponding to the region, and an attribute override control corresponding to the attribute. A memory access request to a memory address is received and determined to be within a first address region defined by a first region descriptor entry and within a second address region defined by a second region descriptor entry. When the attribute override control of the first region descriptor entry indicates that override is to be performed, the value of the attribute of the first region descriptor entry is applied for the memory access. When the attribute override control of the second region descriptor entry indicates that override is to be performed, the value of the attribute of the second region descriptor entry is applied for the memory access.

Claims (44)

1. A data processing system comprising:

a processor; and

a memory protection unit (MPU) coupled to the processor and having control logic, the MPU configured to store a plurality of region descriptor entries, each region descriptor entry defining an address region, an attribute corresponding to the address region, and an attribute override control corresponding to the attribute, wherein the control logic, in response to receiving an access request for an access to an address within an address region defined by a first region descriptor entry of the plurality of region descriptor entries and within an address region defined by a second region descriptor of the plurality of region descriptor entries, is configured to:

use a default policy to determine whether to apply a value of the attribute of the first region descriptor entry or to apply a value of the attribute of the second region descriptor entry for the access when the attribute override control corresponding to the attribute of the first region descriptor entry and the attribute override control corresponding to the second region descriptor entry each have a first value;

apply the value of the attribute of the first region descriptor entry for the access when the attribute override control of the first region descriptor entry corresponding to the attribute has a second value; and

apply the value of the attribute of the second region descriptor entry for the access when the attribute override control of the second region descriptor entry corresponding to the attribute has the second value.

2. The data processing system of claim 1 , wherein the default policy results in selection of either a most restrictive value or a least restrictive value of the values of the attributes of the first and second region descriptor entries for the access.

3. The data processing system of claim 1 , wherein, for each region descriptor entry, the attribute is further characterized as a cache-inhibited attribute which indicates whether or not the address region defined by the region descriptor entry is cache inhibited.

4. The data processing system of claim 3 , wherein the default policy results in selection of a least restrictive value of the cache-inhibited attributes of the first and second region descriptor entries for the access.

5. The data processing system of claim 1 , wherein, for each region descriptor entry, the attribute is further characterized as a guarded attribute which indicates whether or not the address region defined by the region descriptor entry is guarded.

6. The data processing system of claim 5 , wherein the default policy results in selection of a most restrictive value of the guarded attributes of the first and second region descriptor entries for the access.

7. The data processing system of claim 1 , wherein, for each region descriptor entry, the attribute is further characterized as a write protect attribute and indicates whether or not the address region defined by the region descriptor entry is write protected.

8. The data processing system of claim 1 , wherein each region descriptor entry of the MPU further comprises a second attribute corresponding to the region and a second attribute override control corresponding to the second attribute, wherein the control logic, in response to receiving the access request to the address within the address region defined by the first region descriptor entry and within the address region defined by the second region descriptor, is configured to:

use a second default policy to determine whether to apply a value of the second attribute of the first region descriptor entry or to apply a value of the second attribute of the second region descriptor entry for the access when the second attribute override control corresponding to the second attribute of the first region descriptor entry and the second attribute override control corresponding to the second attribute of the second region descriptor entry each have the first value; and

override the second default policy when the second attribute override control corresponding to the second attribute of the first region descriptor entry has the second value or the second attribute override control corresponding to the second attribute of the second region descriptor has the second value.

9. The data processing system of claim 8 , wherein:

when the attribute override control corresponding to the attribute of the first region descriptor entry has the second value, the control logic is configured to apply the value of the attribute of the first region descriptor entry for the access,

when the attribute override control corresponding to the attribute of the second region descriptor entry has the second value, the control logic is configured to apply the value of the attribute of the second region descriptor entry for the access,

when the second attribute override control corresponding to the second attribute of the first region descriptor entry as the second value, the control logic is configured to apply the value of the second attribute of the first region descriptor entry for the access, and

when the second attribute override control corresponding to the second attribute of the second region descriptor entry has the second value, the control logic is configured to apply the value of the second attribute of the second region descriptor entry for the access.

10. The data processing system of claim 9 , wherein the attribute override control of the first region descriptor entry corresponding to the attribute has the second value and the second attribute override control of the second region descriptor entry corresponding to the second attribute has the second value such that the control logic, in response to the receiving the access request, is configured to apply the value of the attribute of the first region descriptor entry for the access and to apply the value of the second attribute of the second region descriptor entry for the access.

11. The data processing system of claim 9 , wherein for each region descriptor entry, the attribute is further characterized as a cache-inhibited attribute which indicates whether or not the address region defined by the region descriptor entry is cache inhibited, and the second attribute is further characterized as a guarded attribute which indicates whether or not the address region defined by the region descriptor entry is guarded.

12. In a data processing system having a memory protection unit (MPU) configured to store a plurality of region descriptor entries, each region descriptor entry defining an address region of a memory, an attribute corresponding to the region, and an attribute override control corresponding to the attribute, a method comprising:

receiving a memory access request to a memory address of the memory;

determining that the memory address is within a first address region defined by a first region descriptor entry of the plurality of region descriptor entries and within a second address region defined by a second region descriptor entry of the plurality of region descriptor entries;

when neither the attribute override control of the first region descriptor entry nor the attribute override control of the second region descriptor entry indicates override is to be performed, using a default policy to determine whether to apply a value of the attribute of the first region descriptor entry or a value of the attribute of the second region descriptor entry;

when the attribute override control of the first region descriptor entry indicates that override is to be performed, applying the value of the attribute of the first region descriptor entry for the memory access; and

when the attribute override control of the second region descriptor entry indicates that override is to be performed, applying the value of the attribute of the second region descriptor entry for the memory access.

13. The method of claim 12 , wherein, for each region descriptor entry, the attribute is further characterized as a cache-inhibited attribute which indicates whether or not the address region defined by the region descriptor entry is cache inhibited, and wherein the step of using the default policy to determine whether to apply the value of the attribute of the first region descriptor entry or the value of the attribute of the second region descriptor entry comprises selecting a least restrictive value of the cache-inhibited attributes of the first and second region descriptor entries for the memory access.

14. The method of claim 12 , wherein, for each region descriptor entry, the attribute is further characterized as a guarded attribute which indicates whether or not the address region defined by the region descriptor entry is guarded, and wherein the step of using the default policy to determine whether to apply the value of the attribute of the first region descriptor entry or the value of the attribute of the second region descriptor entry comprises selecting a most restrictive value of the guarded attributes of the first and second region descriptor entries for the memory access.

15. The method of claim 12 , wherein each of the plurality of region descriptor entries further comprises a second attribute corresponding to the region and a second attribute override control corresponding to the second attribute, wherein the method further comprises:

when neither the second attribute override control of the first region descriptor entry nor the second attribute override control of the second region descriptor entry indicates override is to be performed, using a second default policy to determine whether to apply a value of the second attribute of the first region descriptor entry or a value of the second attribute of the second region descriptor entry;

when the second attribute override control of the first region descriptor entry indicates that override is to be performed, applying the value of the second attribute of the first region descriptor entry for the memory access; and

when the second attribute override control of the second region descriptor entry indicates that override is to be performed, applying the value of the second attribute of the second region descriptor entry for the memory access.

16. The method of claim 15 , wherein the attribute override control of the first region descriptor entry indicates override is to be performed such that the value of the attribute of the first region descriptor entry is applied for the memory access and the second attribute override control of the second region descriptor entry indicates override is to be performed such that the value of the second attribute of the second region descriptor entry is applied for the memory access.

17. In a data processing system having a memory protection unit (MPU) configured to store a plurality of region descriptor entries, each region descriptor entry defining an address region of a memory, a cache inhibited attribute corresponding to the region, and a cache inhibited attribute override control, a method comprising:

receiving a memory access request to a memory address of the memory;

determining that the memory address is within a first address region defined by a first region descriptor entry of the plurality of region descriptor entries and within a second address region defined by a second region descriptor entry of the plurality of region descriptor entries;

when the cache inhibited attribute override control of the first region descriptor entry indicates that override is to be performed, applying the value of the cache inhibited attribute of the first region descriptor entry for the memory access regardless of the value of the cache inhibited attribute of the second region descriptor entry; and

when the cache inhibited attribute override control of the second region descriptor entry indicates that override is to be performed, applying the value of the cache inhibited attribute of the second region descriptor entry for the memory access regardless of the value of the cache inhibited attribute of the first region descriptor entry.

18. The method of claim 17 , further comprising:

when neither the cache inhibited attribute override control of the first region descriptor entry nor the cache inhibited attribute override control of the second region descriptor entry indicates override is to be performed, selecting a cache inhibited attribute value from the cache inhibited attributes of the first and second region descriptor entries which results in a least restrictive cache inhibited policy.

19. The method of claim 17 , further comprising:

when neither the cache inhibited attribute override control of the first region descriptor entry nor the cache inhibited attribute override control of the second region descriptor entry indicates override is to be performed, selecting a cache inhibited attribute value from the cache inhibited attributes of the first and second region descriptor entries which results in a most restrictive cache inhibited policy.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
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To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
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From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
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To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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