IP Library Granted Patent US 8,473,273
Granted Patent B2
US 8,473,273 · App. 13/185,263 · Granted Jun 25, 2013

Fault support in an emulation environment

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Quick Facts
Patent No.
US 8,473,273
App. No.
13/185,263
Granted
Jun 25, 2013
Kind
B2
Abstract

An emulator is disclosed that allows for diagnoses of failures or defects within the emulator. A map of faulty resources is generated to identify which resources should be avoided during compilation. Thus, in a transparent and automated manner, defects found during diagnostics are stored in a database of unusable emulator resources. A compiler has access to the database and compiles the design taking into account unusable resources. In another embodiment, the defects of an emulator board are stored on the emulator board itself. This allows each board to store its own maintenance information that can be used at the manufacturing site for changing defective chips. Defects stored on the board itself allow the defects to be obtained independent of a position of a board within the emulator to simplify identification of the faulty resource.

Claims (39)

1. A method of loading a design into a hardware emulator, comprising:

storing faults, associated with components on an emulator board, in memory on the emulator board, the stored faults indicating defective or unusable resources on the emulator board;

compiling the design to be emulated by avoiding use of components with the faults by accessing the stored faults during compilation; and

loading the compiled design into the emulator.

2. The method of claim 1 , further including storing the faults external to the emulator board and wherein compiling further includes reading the faults stored external to the emulator board or the faults stored in the memory on the emulator board.

3. The method of claim 2 , further including comparing the faults stored external to the emulator board to the faults in the memory and issuing an indication if they are different.

4. The method of claim 1 , wherein the memory is non-volatile memory and wherein storing faults on the emulator board includes running diagnostics on the emulator board to determine components with faults and wherein storing includes storing results of the diagnostics in the non-volatile memory on the emulator board.

5. The method of claim 1 , further including reading a fault avoidance type and wherein compiling includes determining components that are available for compilation using the faults and the fault avoidance type.

6. The method of claim 1 , further including combining faults across multiple emulator boards and compiling the design based on the combined faults.

7. The method of claim 1 , further including combining faults across multiple emulators and compiling the design based on the combined faults so that the design runs on any one of the emulators.

8. The method of claim 1 , wherein storing faults on the emulator board includes running diagnostics on the emulator board and storing results of the diagnostics in a non-volatile memory on the emulator board and also storing the results in a database located externally of the emulator board.

9. The method of claim 8 , further including comparing the faults stored in the database to the faults stored in the non-volatile memory and issuing an error indication if they are different.

10. The method of claim 1 , further including storing a board serial number on the board and checking the board serial number prior to downloading the compiled design to the board.

11. An emulator for emulating a user design, comprising:

multiple printed circuit boards having programmable logic thereon for emulating the user design in hardware; and

at least one non-volatile memory located on one of the printed circuit boards in the emulator for storing faults locally on the circuit board;

wherein the faults indicate malfunctioning components on the circuit board and wherein the faults are accessible for use in compilation of the user design.

12. The emulator of claim 11 , further including a resource server coupled to the multiple circuit boards and a database, the resource server coupled to retrieve faults from the different circuit boards and store the faults in the database.

13. The emulator of claim 11 , further including a compiler that uses the stored faults in order to compile the design.

14. The emulator of claim 11 , wherein the non-volatile memory is flash memory.

15. The emulator of claim 11 , further including a resource server coupled to the multiple circuit boards, the resource server checking a serial number of a printed circuit board prior to downloading a design to the circuit board to ensure that the design is loaded on the correct circuit board.

16. An emulator comprising:

means for storing faults associated with components on an emulator board in the emulator, wherein the stored faults indicate defective or unusable resources on the emulator board; and

means for compiling the design to be emulated by reading the stored faults and avoiding the use of components with the faults.

17. The emulator of claim 16 , further including means for running diagnostics on the emulator board and storing the results in a non-volatile memory on the emulator board.

18. The emulator of claim 16 , further including means for combining faults across multiple emulator boards and compiling the design based on the combined faults so that the design runs on any of the boards.

19. A computer-readable storage storing instructions thereon for executing a method of loading a design into a hardware emulator, the method comprising:

storing faults, associated with components on an emulator board, in memory on the emulator board, the stored faults indicating defective or unusable resources on the emulator board;

compiling the design to be emulated by avoiding use of components with the faults by accessing the stored faults during compilation; and

loading the compiled design into the emulator.

20. The computer-readable storage of claim 19 , further including storing the faults external to the emulator board and wherein compiling further includes reading the faults stored external to the emulator board or the faults stored in the memory on the emulator board.

21. The computer-readable storage of claim 20 further including comparing the faults stored external to the emulator board to the faults in the memory and issuing an indication if they are different.

22. The computer-readable storage of claim 19 , wherein the memory is non-volatile memory and wherein storing faults on the emulator board includes running diagnostics on the emulator board to determine components with faults and wherein storing includes storing results of the diagnostics in the non-volatile memory on the emulator board.

23. The computer-readable storage of claim 19 , further including reading a fault avoidance type and wherein compiling includes determining components that are available for compilation using the faults and the fault avoidance type.

24. The computer-readable storage of claim 19 , further including combining faults across multiple emulator boards and compiling the design based on the combined faults.

25. The computer-readable storage of claim 19 , further including combining faults across multiple emulators and compiling the design based on the combined faults so that the design runs on any one of the emulators.

26. The computer-readable storage of claim 19 , wherein storing faults on the emulator board includes running diagnostics on the emulator board and storing results of the diagnostics in a non-volatile memory on the emulator board and also storing the results in a database located externally of the emulator board.

27. The computer-readable storage of claim 26 , further including comparing the faults stored in the database to the faults stored in the non-volatile memory and issuing an error indication if they are different.

28. The computer-readable storage of claim 19 , further including storing a board serial number on the board and checking the board serial number prior to downloading the compiled design to the board.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Jun 2, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056510/0240 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2011
From: DURAND, ERIC; REYMOND, ESTELLE; FADEL, JOHN
To: MENTOR GRAPHICS CORPORATION, META SYSTEMS DIVISION
Reel/Frame 026991/0764 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2011
From: MENTOR GRAPHICS CORPORATION, META SYSTEMS DIVISION
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 026991/0811 →