Systems and methods for data conversion
Systems and methods are provided for converting analog data to digital data that can include a discharge capacitor coupled to a voltage source. The voltage source supplies an initial data charge to the discharge capacitor; an amplifier coupled to the discharge capacitor; a divider circuit coupled to the amplifier; and a comparator coupled to the amplifier and the divider circuit. The divider circuit includes a first capacitor, a second capacitor, and a switch that is operated to alternately divide a remaining charge Q by 2 N using the first and second capacitors until the remaining data charge Qin at the amplifier is below a threshold value in the process of converting analog data to digital data.
1. A non-transitory computer processing system comprising:
an analog to digital converter ADC circuit that includes:
a discharge circuit including:
an amplifier, wherein a first input of the amplifier is coupled to a first ground level, and
a discharge capacitor coupled between an output of the amplifier and the first ground level; and
a divider circuit coupled to the discharge circuit via the first ground level, the divider circuit including:
a first divider capacitor,
a first divider switch coupled in parallel to the first divider capacitor,
a second divider capacitor coupled in parallel to the first divider capacitor,
a third divider switch coupled in series between the first divider capacitor and the second divider capacitor,
wherein the first divider switch is coupled between the first ground level and the third divider switch, and the first and second divider capacitors are coupled between a second ground level and the third divider switch.
2. The non-transitory computer processing system of claim 1 further comprising:
a second divider switch coupled in parallel to the second divider capacitor, wherein the second divider switch is coupled between the first ground level and the third divider switch.
3. The non-transitory computer processing system of claim 1 further comprising:
a comparator including a first comparator input and a second comparator input, wherein the first comparator input is coupled to the output of the amplifier and the second comparator input is coupled to an output of the divider circuit.
4. The non-transitory computer processing system of claim 1 further comprising:
a fourth switch coupled to the second comparator input, the fourth switch including one terminal coupled between the first divider capacitor and the third divider switch, and a second terminal coupled between the second divider capacitor and the third divider switch.
5. The non-transitory computer processing system of claim 2 wherein the first and second divider switches operate between respective first and second positions,
the first position couples the first and second divider switches to the first ground level, and
the second position couples the first and second divider switches to the second ground level.
6. The non-transitory computer processing system of claim 5 wherein the first and second divider switches operate between the respective first and second positions and a third position, the third position couples the first and second divider switches to a neutral position.
7. The non-transitory computer processing system of claim 3 , wherein the only capacitors used for analog to data conversion are the discharge capacitor and the first and second divider capacitors.
8. The non-transitory computer processing system of claim 1 wherein the discharge circuit further includes:
a voltage source coupled in parallel with the discharge capacitor.
9. The non-transitory computer processing system of claim 1 wherein the discharge circuit further includes:
a first discharge switch coupled in series with the output of the amplifier and between the discharge capacitor and the voltage source;
a second discharge switch coupled in series with the first input to the amplifier and between the discharge capacitor and the voltage source;
a third discharge switch coupled in series with the output of the amplifier and between the discharge capacitor and the amplifier; and
a fourth discharge switch coupled in series with the first input to the amplifier and between the discharge capacitor and the amplifier.
10. The non-transitory computer processing system of claim 1 wherein the first and second divider capacitors generate successive Q/2 N charges that are removed from the discharge capacitor through the amplifier.
11. A method for converting an analog signal to a digital signal in a processing system comprising:
charging a discharge capacitor to an initial data charge Qin with a voltage source; and
performing N successive analog subtractions from the initial data charge Qin, wherein the analog subtractions are performed using an amplifier coupled to the discharge capacitor and a divider circuit coupled to the amplifier, and the divider circuit includes a first capacitor, a second capacitor, and a switch to alternately divide a remaining charge Q by 2 N using the first and second capacitors until the remaining charge Qin at the amplifier is below a threshold value.
12. The method of claim 11 further comprising:
operating a first set of switches to isolate an amplifier from the discharge capacitor while the voltage source applies the Qin to the discharge capacitor.
13. The method of claim 12 further comprising:
operating a second set of switches coupled in series between the voltage source and discharge capacitor to isolate the discharge capacitor from the voltage source.
14. The method of claim 13 further comprising:
operating the first set of switches and the second set of switches to load voltage from the discharge capacitor across the amplifier.
15. The method of claim 11 further comprising:
testing functional capability of analog to digital conversion by applying a variety of different initial charges to the amplifier the discharge capacitor.
16. A semiconductor device comprising:
a discharge capacitor coupled to a voltage source, wherein the voltage source supplies an initial data charge to the discharge capacitor;
an amplifier coupled to the discharge capacitor;
a divider circuit coupled to the amplifier; and
a comparator coupled to the amplifier and the divider circuit, wherein the divider circuit includes a first capacitor, a second capacitor, and a switch that is operated to alternately divide a remaining charge Q by 2 N using the first and second capacitors until the remaining charge Qin at the amplifier is below a threshold value in the process of converting analog data to digital data.
17. The semiconductor device of claim 16 further comprising:
a first set of switches configured to isolate an amplifier from the discharge capacitor while the voltage source applies an initial charge Qin to the discharge capacitor.
18. The semiconductor device of claim 17 further comprising:
a second set of switches coupled in series between the voltage source and discharge capacitor and configured to isolate the discharge capacitor from the voltage source.
19. The semiconductor device of claim 18 further comprising:
the first set of switches and the second set of switches are configured to load voltage from the discharge capacitor across the amplifier.
20. The semiconductor device of claim 16 wherein the divider circuit is coupled to the discharge capacitor and the amplifier via a first ground level, the semiconductor device further comprising:
a first divider switch coupled between the first ground level and the switch, and the first and second divider capacitors are coupled between a second ground level and the switch.