IP Library Granted Patent US 8,575,030
Granted Patent B2
US 8,575,030 · App. 13/196,594 · Granted Nov 5, 2013

Semiconductor device manufacturing method

Inventors: Gaku Minamihaba (Yokohama, JP); Yukiteru Matsui (Yokohama, JP); Nobuyuki Kurashima (Yokohoma, JP); Hajime Eda (Kawasaki, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,575,030
App. No.
13/196,594
Granted
Nov 5, 2013
Kind
B2
Abstract

According to one embodiment, a semiconductor device manufacturing method is disclosed. The method can include polishing a film on a semiconductor substrate by pressing the film against a polishing pad. Polishing the film comprises performing first polishing in which an entrance temperature of the polishing pad is adjusted to 40° C. (inclusive) to 50° C. (inclusive), and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature. Polishing the film comprises performing second polishing in which the entrance temperature is adjusted to 30° C. or less, and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature.

Claims (55)

1. A semiconductor device manufacturing method comprising:

polishing a film on a semiconductor substrate by pressing the film against a polishing pad which rotates in a predetermined direction,

wherein polishing the film to be processed comprises

performing a first polishing in which an entrance temperature of the polishing pad is adjusted to be equal to or higher than 40° C. and be equal to or lower than 50° C., and an exit temperature of the polishing pad is adjusted to be higher by 5° C. or more than the entrance temperature, the entrance temperature being a temperature of a surface of the polishing pad on an upstream side in the rotational direction of the polishing pad from the film pressed on the polishing pad, and the exit temperature being a temperature of a surface of the polishing pad on a downstream side in the rotational direction of the polishing pad from the film pressed on the polishing pad, and

performing a second polishing in which the entrance temperature is adjusted to be equal to or lower than 30° C., and the exit temperature is adjusted to be higher by 5° C. or more than the entrance temperature.

2. The method of claim 1 , wherein the first polishing is switched to the second polishing when a thickness of the film is equal to or thicker than 50 nm.

3. The method of claim 1 , wherein when performing the first polishing and the second polishing,

the film is partitioned into regions, and a thickness of the film is measured in each of the regions, and

a polishing load to the film is adjusted in each of the regions based on the thickness of the film measured in each of the regions.

4. The method of claim 3 , wherein a gradient of a relationship between the polishing load to the film and a polishing rate of the film is equal to or more than 50 [nm/min]/50 [hPa].

5. The method of claim 1 , wherein when switching the first polishing to the second polishing, the entrance temperature is adjusted by supplying pure water.

6. The method of claim 1 , wherein the entrance temperature and the exit temperature are temperatures of the polishing pad on a circular orbit passing through a center of the semiconductor substrate and having a predetermined distance from a rotational axis of the polishing pad.

7. The method of claim 6 , wherein the entrance temperature and the exit temperature are temperatures of the polishing pad in a position at a predetermined distance from the semiconductor substrate.

8. The method of claim 1 , wherein the exit temperature is adjusted by controlling a polishing load between the semiconductor substrate and the polishing pad.

9. The method of claim 1 , further comprising:

before polishing the film to the processed,

forming an insulating film on the semiconductor substrate,

forming a trench in the insulating film, and

forming a metal film in the trench and on the insulating film outside the trench,

wherein the film is the metal film formed outside the trench.

10. The method of claim 1 , further comprising:

before polishing the film,

forming an STI pattern in the semiconductor substrate, and

forming an insulating film in the STI pattern and on the semiconductor substrate outside the STI pattern,

wherein the film is the insulating film formed outside the STI pattern.

11. A semiconductor device manufacturing method comprising:

polishing a film on a semiconductor substrate by pressing the film against a polishing pad which rotates in a predetermined direction,

wherein polishing the film to be processed comprises

adjusting an entrance temperature of the polishing pad to be equal to or lower than 30° C., and adjusting an exit temperature of the polishing pad to be higher by 5° C. or more than the entrance temperature, the entrance temperature being a temperature of a surface of the polishing pad on an upstream side in the rotational direction of the polishing pad from the film pressed on the polishing pad, and the exit temperature being a temperature of a surface of the polishing pad on a downstream side in the rotational direction of the polishing pad from the film pressed on the polishing pad.

12. The method of claim 11 , wherein when polishing the film,

the film is partitioned into regions, and a thickness of the film is measured in each of the regions, and

a polishing load to the film is adjusted in each of the regions based on the thickness of the film measured in each of the regions.

13. The method of claim 12 , wherein a gradient of a relationship between the polishing load to the film and a polishing rate of the film is equal to or more than 50 [nm/min]/50 [hPa].

14. The method of claim 11 , wherein the entrance temperature and the exit temperature are temperatures of the polishing pad on a circular orbit passing through a center of the semiconductor substrate and having a predetermined distance from a rotational axis of the polishing pad.

15. The method of claim 11 , further comprising:

before polishing the film to be processed,

forming an insulating film on the semiconductor substrate,

forming a trench in the insulating film, and

forming a metal film in the trench and on the insulating film outside the trench,

wherein the film is the metal film formed outside the trench.

16. A semiconductor device manufacturing method comprising:

polishing a film on a semiconductor substrate by pressing the film against a polishing pad which rotates in a predetermined direction,

wherein polishing the film to be processed comprises

adjusting an entrance temperature of the polishing pad to be equal to or higher than 40° C. and be equal to or lower than 50° C., and adjusting an exit temperature of the polishing pad to be higher by 5° C. or more than the entrance temperature, the entrance temperature being a temperature of a surface of the polishing pad on an upstream side in the rotational direction of the polishing pad from the film pressed on the polishing pad, and the exit temperature being a temperature of a surface of the polishing pad on a downstream side in the rotational direction of the polishing pad from the film pressed from the film pressed on the polishing pad.

17. The method of claim 16 , wherein when polishing the film,

the film is partitioned into regions, and a thickness of the film is measured in each of the regions, and

a polishing load to the film is adjusted in each of the regions based on the thickness of the film measured in each of the regions.

18. The method of claim 17 , wherein a gradient of a relationship between the polishing load to the film and a polishing rate of the film is equal to or more than 50 [nm/min]/50 [hPa].

19. The method of claim 16 , wherein the entrance temperature and the exit temperature are temperatures of the polishing pad on a circular orbit passing through a center of the semiconductor substrate and having a predetermined distance from a rotational axis of the polishing pad.

20. The method of claim 16 , further comprising:

before polishing the film to be processed,

forming an insulating film on the semiconductor substrate,

forming a trench in the insulating film, and

forming a metal film in the trench and on the insulating film outside the trench,

wherein the film is the metal formed outside the trench.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2011
From: MINAMIHABA, GAKU; MATSUI, YUKITERU; KURASHIMA, NOBUYUKI; EDA, HAJIME
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 026689/0388 →
Priority Claims (2)
JP 2010-175692 · Aug 4, 2010 · national
JP 2011-061559 · Mar 18, 2011 · national
Continuity (1)
Related Publication 20120034846A1 · Feb 9, 2012