High Voltage Durability III-Nitride HEMT
A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority charge carrier conductivity type, formed over the second silicon body. The second silicon body has a conductivity type opposite the majority charge carrier conductivity type. In one embodiment, the high voltage durability III-nitride semiconductor device is a high electron mobility transistor (HEMT) comprising a support substrate including a <100> silicon layer, an insulator layer over the <100> silicon layer, and a P type conductivity <111> silicon layer over the insulator layer. The high voltage durability HEMT also comprises a III-nitride semiconductor body formed over the P type conductivity <111> silicon layer, the III-nitride semiconductor body forming a heterojunction of the HEMT.
1 - 18 . (canceled)
19 . A high voltage durability, high electron mobility transistor (HEMT), said high voltage durability HEMT comprising:
a support substrate including a <100> silicon layer, an insulator layer over said <100> silicon layer, and a P type conductivity <111> silicon layer over said insulator layer;
a III-nitride semiconductor body formed over said P type conductivity <111> silicon layer, said III-nitride semiconductor body forming a heterojunction of said HEMT.
20 . The high voltage durability HEMT of claim 19 , wherein a breakdown voltage of said HEMT is greater than 800 volts.
21 . The high voltage durability HEMT of claim 19 , wherein said III-nitride semiconductor body comprises aluminum gallium nitride (AlGaN) situated over gallium nitride (GaN).
22 . The high voltage durability HEMT of claim 19 , wherein said <100> silicon layer has N type conductivity.
23 . The high voltage durability HEMT of claim 19 , wherein said <100> silicon layer has P type conductivity.
24 . The high voltage durability HEMT of claim 22 , further comprising a silicon semiconductor device formed on said <100> silicon layer.
25 . The high voltage durability HEMT of claim 24 , wherein said silicon semiconductor device comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).
26 . The high voltage durability HEMT of claim 23 , further comprising a silicon semiconductor device formed on said <100> silicon layer.
27 . The high voltage durability HEMT of claim 26 , wherein said silicon semiconductor device comprises a metal-oxide-semiconductor field-effect transistor (MOSFET).
28 . The high voltage durability HEW of claim 19 , wherein said III-nitride body comprises a PMOS device.
29 . The high voltage durability HEMT of claim 19 , further comprising power electrodes formed over said III-nitride semiconductor body.
30 . The high voltage durability HEMT of claim 29 , further comprising a gate situated between said power electrodes.
31 . The high voltage durability HEMT of claim 30 , wherein said III-nitride body includes a III-nitride heterojunction having a two-dimensional electron gas that includes an interrupted region under said gate.
32 . A high voltage durability, high electron mobility transistor (HEMT), said high voltage durability HEMT comprising:
a support substrate including a <100> silicon layer, an insulator layer over said <100> silicon layer, and an N type conductivity <111> silicon layer over said insulator layer;
a III-nitride semiconductor body formed over said N type conductivity <111> silicon layer, said III-nitride semiconductor body forming a heterojunction of said HEMT.
33 . The high voltage durability HEMT of claim 32 , wherein a breakdown voltage of said HEMT is greater than 800 volts.
34 . The high voltage durability HEMT of claim 32 , wherein said III-nitride semiconductor body comprises aluminum gallium nitride (AlGaN) situated over gallium nitride (GaN).
35 . The high voltage durability HEMT of claim 32 , wherein said <100> silicon layer has N type conductivity.
36 . The high voltage durability HEMT of claim 32 , wherein said <100> silicon layer has P type conductivity.
37 . The high voltage durability HEMT of claim 35 , further comprising a silicon semiconductor device formed on said <100> silicon layer.
38 . The high voltage durability HEMT of claim 36 , further comprising a silicon semiconductor device formed on said <100> silicon layer.