IP Library Granted Patent US 9,058,207
Granted Patent B2
US 9,058,207 · App. 13/198,828 · Granted Jun 16, 2015

Simulation apparatus, method, and computer-readable recording medium

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Quick Facts
Patent No.
US 9,058,207
App. No.
13/198,828
Granted
Jun 16, 2015
Kind
B2
Abstract

A simulation apparatus is disclosed, including a group switching part. The group switching part refers to a priority management table, which manages priority information of priorities to assign a CPU for multiple groups of tasks stored in a storage area, and changes the priorities of the multiple groups of tasks, when an event occurs to activate a task to be executed in verifying of software by using a simulation.

Claims (17)

1. A simulation apparatus, comprising a computer being configured to perform a process including:

referring to a priority management table, which manages priority information of priorities to assign a CPU for multiple groups of tasks stored in a storage area, the priority information defined for each of reference times so that the tasks of the multiple groups are assigned in sequence to the CPU; and

when a first interruption to a task of a first group of the multiple groups occurs at a first time in a first term in which a high priority is set to the first group, causing an event corresponding to the first interruption to occur in the first term, and when a second interruption to a task of a second group of the multiple groups occurs at the first time, causing an event corresponding to the second interruption to occur at an interruption time by a delay interruption after the first time, the interruption time being a nearest future time at which a high priority is set to the second group, the nearest future time being calculated based on a current time and a reference time at which a high priority is set to the second group in the priority management table.

2. The simulation apparatus as claimed in claim 1 , wherein the process further includes:

selecting one of the reference times by calculating from the current time of the simulation;

determining one of the multiple groups of tasks which has a high priority at the current time based on the priority information defined for a selected reference time; and

changing the priorities of the multiple groups of tasks based on the priority information of the selected reference time corresponding to the current time.

3. The simulation apparatus as claimed in claim 1 , wherein the process further includes referring to one or more reference times when the priority of the first group to which the task to be executed belongs indicates high, by using the priority information managed in the priority management table, to calculate from the current time of the simulation, and to determine the nearest future time at which the priority of the first group will become high.

4. The simulation apparatus as claimed in claim 1 , wherein the process further includes adding the event to the interruption time of a time wheel in a main unit, the interruption time to conduct the delay interruption.

5. The simulation apparatus as claimed in claim 1 , wherein the causing the event sets the interruption time to conduct the delay interruption to a timer model, so as to delay the event occurring.

6. The simulation apparatus as claimed in claim 1 , wherein a count of the reference times corresponds to a count of the multiple groups.

7. A simulation method performed in a computer, comprising:

referring to, by the computer, a priority management table, which manages priority information of priorities to assign a CPU for multiple groups of tasks stored in a storage area, the priority information defined for each of reference times so that the tasks of the multiple groups are assigned in sequence to the CPU; and

when a first interruption to a task of a first group of the multiple groups occurs at a first time in a first term in which a high priority is set to the first group, causing, by the computer, an event corresponding to the first interruption to occur in the first term, and when a second interruption to a task of a second group of the multiple groups occurs at the first time, causing, by the computer, an event corresponding to the second interruption to occur at an interruption time by a delay interruption after the first time, the interruption time being a nearest future time at which a high priority is set to the second group, the nearest future time being calculated based on a current time and a reference time at which a high priority is set to the second group in the priority management table.

8. A non-transitory computer-readable recording medium recorded with a program which, when executed by a computer, causes the computer to perform a process comprising:

referring to a priority management table, which manages priority information of priorities to assign a CPU for multiple groups of tasks stored in a storage area, the priority information defined for each of reference times so that the tasks of the multiple groups are assigned in sequence to the CPU; and

when a first interruption to a task of a first group of the multiple groups occurs at a first time in a first term in which a high priority is set to the first group, causing an event corresponding to the first interruption to occur in the first term, and when a second interruption to a task of a second group of the multiple groups occurs at the first time, causing an event corresponding to the second interruption to occur at an interruption time by a delay interruption after the first time, the interruption time being the nearest future time at which a high priority is set to the second group, the nearest future time being calculated based on a current time and a reference time at which a high priority is set to the second group in the priority management table.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035453/0904 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2011
From: TERASHIMA, HIROSHI; NAKAMURA, YASUKI; KUYA, RYO; YOSHINO, TATSUYA; KIMURA, MASAHARU
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026861/0010 →