Method and device for controlling debug event resources
View Patent ↗Software executed at a data processor unit includes a software debugger. The software debugger can be assigned responsibility for servicing a debug event, and be authorized to allow software control of debug event resources associated with the debug event. An indicator, when asserted, prevents a authorized request by software to control a debug event resource.
1. A method comprising:
preventing an authorized request from a software debugger to control a debug event resource, the debug event resource configured to be owned by the software debugger, wherein the software debugger and the debug event resource are both portions of a data processor unit, and the debug event is a debug event of the data processor unit.
2. The method of claim 1 , wherein the preventing is responsive to an indicator received at a debug circuitry that includes the debug event resource.
3. The method of claim 2 , wherein the indicator is provided by a peripheral to the data processor unit.
4. The method of claim 3 , further comprising:
providing a first debug event notification to the peripheral, the first debug event notification provided based upon a first occurrence of the debug event occurring, wherein the first occurrence occurs after the preventing; and
servicing the first debug event notification at the peripheral.
5. The method of claim 4 , wherein the indicator is provided by the peripheral responsive to the peripheral servicing a second debug event notification based upon an occurrence of the debug event that prior to the first debug event notification.
6. The method of claim 4 , wherein providing the first debug event notification includes providing the first debug event notification to a bus interface unit of the data processor unit for transmission to the peripheral over a system bus interface.
7. The method of claim 3 further comprising:
providing a first debug event notification based upon an occurrence of the debug event to a system bus interface for transmission to the peripheral; and
providing the indicator from the peripheral to the system bus interface for transmission to the data processor unit.
8. The method of claim 7 , wherein the indicator is included in a write request to write an address to an address compare field of a debug register of the debug circuitry, and the occurrence of the debug event occurs based upon a match between the address stored at the address compare field and an address being processed by the data processor unit.
9. The method of claim 1 , wherein the request is a write request to a field of a debug register of the debug circuitry.
10. The method of claim 1 , wherein the preventing is responsive to an indicator received at an external pin of the data processor unit, the external pin not associated with a debug interface that provides debug control information between the data processor unit and a hardware debugger.
11. The method of claim 1 further comprising:
storing a first indicator at debug circuitry to indicate the debug event resource is configured to be owned by a hardware debugger that is external the data processor unit, the first indicator provides the hardware debugger responsibility for servicing the debug event or for assigning shared responsibility of servicing the debug event, authorization to write register fields of the debug circuitry associated with detection of the debug event, and wherein after storing the first indicator the software debugger does not have authorization to write to the register fields; and
storing, prior to the preventing, a second indicator from the hardware debugger to the debug circuitry to configure the debug event resource to be owned by the software debugger.
12. The method of claim 1 , wherein the occurrence of the debug event occurs based upon a match between information stored at a field of the debug register and a current value being processed by the data processor unit.
13. An integrated circuit comprising a data processor unit, the data processor unit comprising:
a debug event resource controlled by a plurality of debug fields, including a first portion of the plurality of debug fields that are to store information that indicates a software debugger is to service a debug event of the debug event resource, and a second portion of the plurality of debug fields to determine the occurrence of a debug event of the debug event; and
an access control module comprising a first input to receive a freeze signal, and, when the information indicates that a software debugger is to service the debug event, the access control module to determine an authorized access request to the second portion of the plurality of debug fields by the software debugger is to be ignored responsive to the freeze signal having a first state.
14. The integrated circuit of claim 13 further comprising:
a debug interface unit to communicate the occurrence of debug events to be serviced by a hardware debugger external the data processor unit.
15. The integrated circuit of claim 13 further comprising:
a peripheral;
a system interconnect coupled to the data processor unit and to the peripheral; and
a system interface unit to receive notification of the occurrence of the debug event, and to communicate the notification to the peripheral via the system interconnect.
16. A method comprising:
storing at a data processor unit a first indicator that assigns servicing of a debug event to a software debugger of the data processor unit, and that authorizes a debug event resource of the debug event to be controlled by software routines initiated by the software debugger;
receiving, from an authorized request responsive to a software routine initiated by the software debugger, a request to control the debug event resource; and
determining whether to prevent the authorized request from controlling the debug event resource based upon a second indicator.
17. The method of claim 16 , wherein the second indicator is based upon an input signal provided to an input of the data processor unit concurrently with determining whether to prevent the authorized access.
18. The method of claim 16 , wherein the second indicator is provided to the data processor unit via an interconnect from a peripheral, wherein the interconnect communicates information between the data processor unit and a plurality of peripherals including the peripheral.
19. The method of claim 16 , wherein the debug event is based upon an address stored at the debug event resource matching an address being processed by the data processor unit.
20. The method of claim 16 , wherein the request to control the debug event resource is a write request.