IP Library › Granted Patent US 8,704,230
Granted Patent B2
US 8,704,230 · App. 13/212,391 · Granted Apr 22, 2014

Semiconductor device and manufacturing method thereof

Inventor: Hidekazu Miyairi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,704,230
App. No.
13/212,391
Granted
Apr 22, 2014
Kind
B2
Abstract

To reduce parasitic capacitance between a gate electrode and a source electrode or drain electrode of a dual-gate transistor. A semiconductor device includes a first insulating layer covering a first conductive layer; a first semiconductor layer, second semiconductor layers, and an impurity semiconductor layer sequentially provided over the first insulating layer; a second conductive layer over and at least partially in contact with the impurity semiconductor layer; a second insulating layer over the second conductive layer; a third insulating layer covering the three semiconductor layers, the second conductive layer, and the second insulating layer; and a third conductive layer over the third insulating layer. The third conductive layer overlaps with a portion of the first semiconductor layer, which does not overlap with the second semiconductor layers, and further overlaps with part of the second conductive layer.

Claims (66)

1. A semiconductor device comprising:

a first insulating layer over a first conductive layer;

a first semiconductor layer over the first insulating layer;

a pair of second semiconductor layers over the first semiconductor layer, the pair of second semiconductor layers being spaced from each other;

an impurity semiconductor layer over the pair of second semiconductor layers;

a second conductive layer over the impurity semiconductor layer;

a second insulating layer over the second conductive layer;

a third insulating layer over the first semiconductor layer, the pair of second semiconductor layers, the impurity semiconductor layer, the second conductive layer, and the second insulating layer; and

a third conductive layer over the third insulating layer, the third conductive layer overlapping with the first semiconductor layer and the second conductive layer,

wherein the third insulating layer is in contact with the first semiconductor layer between the pair of second semiconductor layers.

2. The semiconductor device according to claim 1 , wherein the second insulating layer is thicker than the third insulating layer.

3. The semiconductor device according to claim 1 , wherein the third conductive layer has a light-transmitting property.

4. The semiconductor device according to claim 1 , wherein an uppermost layer of the first insulating layer comprises a silicon nitride layer or a silicon nitride oxide layer.

5. A semiconductor device comprising:

a first insulating layer over a first conductive layer;

a first semiconductor layer over the first insulating layer;

a pair of second semiconductor layers over the first semiconductor layer, the pair of second semiconductor layers being spaced from each other;

an impurity semiconductor layer over the pair of second semiconductor layers;

a second conductive layer over the impurity semiconductor layer;

a second insulating layer over the second conductive layer;

a third insulating layer over the first semiconductor layer, the pair of second semiconductor layers, the impurity semiconductor layer, the second conductive layer, and the second insulating layer, and

a fourth insulating layer over the third insulating layer; and

a third conductive layer over the fourth insulating layer, the third conductive layer overlapping with the first semiconductor layer, and the second conductive layer,

wherein the third insulating layer is in contact with the first semiconductor layer between the pair of second semiconductor layers.

6. The semiconductor device according to claim 5 , wherein the second insulating layer is thicker than the third insulating layer.

7. The semiconductor device according to claim 5 , wherein the third conductive layer has a light-transmitting property.

8. The semiconductor device according to claim 5 , wherein the fourth insulating layer overlaps with a part of the second conductive layer.

9. The semiconductor device according to claim 5 , wherein an uppermost layer of the first insulating layer comprises a silicon nitride layer or a silicon nitride oxide layer.

10. A method for manufacturing a semiconductor device comprising the steps of:

forming a first insulating layer over a first conductive layer;

forming a thin film layered body in which a first semiconductor layer, a second semiconductor layer and an impurity semiconductor layer are stacked in this order over the first insulating layer;

forming a conductive film over the thin film layered body;

forming an insulating film over the conductive film;

forming a second insulating layer by etching the insulating film;

forming a second conductive layer by etching the conductive film;

removing a portion of the impurity semiconductor layer and the second semiconductor layer, which do not overlap with the second conductive layer so that a portion of the first semiconductor layer is exposed;

forming a third insulating layer over the first semiconductor layer, the second semiconductor layer, the impurity semiconductor layer, the second conductive layer, and the second insulating layer; and

forming a third conductive layer over the third insulating layer, so that the third conductive layer overlaps with the portion of the first semiconductor layer and a part of the second conductive layer,

wherein the third insulating layer is in contact with the first semiconductor layer.

11. The method for manufacturing the semiconductor device according to claim 10 , wherein the second insulating layer is thicker than the third insulating layer.

12. The method for manufacturing the semiconductor device according to claim 10 , wherein the third conductive layer has a light-transmitting property.

13. The method for manufacturing the semiconductor device according to claim 10 , wherein the second insulating layer and the second conductive layer are formed in the same etching step.

14. The method for manufacturing the semiconductor device according to claim 10 , further comprising the step of exposing the portion of the first semiconductor layer to mixed gas plasma of a hydrogen gas and an oxygen gas.

15. The method for manufacturing the semiconductor device according to claim 10 , wherein an uppermost layer of the first insulating layer comprises a silicon nitride layer or a silicon nitride oxide layer.

16. The method for manufacturing the semiconductor device according to claim 15 , further comprising the step of exposing the first insulating layer to plasma generated by a N2O gas.

17. The method for manufacturing the semiconductor device according to claim 10 , further comprising the step of exposing a side surface of the thin film layered body to oxygen plasma or nitrogen plasma.

18. A method for manufacturing a semiconductor device comprising the steps of:

forming a first insulating layer over a first conductive layer;

forming a thin film layered body in which a first semiconductor layer, a second semiconductor layer and an impurity semiconductor layer are stacked in this order over the first insulating layer;

forming a conductive film over the thin film layered body;

forming an insulating film over the conductive film;

forming a second insulating layer by etching the insulating film;

forming a second conductive layer by etching the conductive film;

removing a portion of the impurity semiconductor layer and the second semiconductor layer, which do not overlap with the second conductive layer so that a portion of the first semiconductor layer is exposed;

forming a third insulating layer over the first semiconductor layer, the second semiconductor layer, the impurity semiconductor layer, the second conductive layer, and the second insulating layer;

forming a fourth insulating layer over the third insulating layer; and

forming a third conductive layer over the fourth insulating layer, so that the third conductive layer overlaps with the portion of the first semiconductor layer and a part of the second conductive layer,

wherein the third insulating layer is in contact with the first semiconductor layer.

19. The method for manufacturing the semiconductor device according to claim 18 , wherein the second insulating layer is thicker than the third insulating layer.

20. The method for manufacturing the semiconductor device according to claim 18 , wherein the third conductive layer has a light-transmitting property.

21. The method for manufacturing the semiconductor device according to claim 18 , wherein the second insulating layer and the second conductive layer are formed in the same etching step.

22. The method for manufacturing the semiconductor device according to claim 18 , further comprising the step of exposing the portion of the first semiconductor layer to mixed gas plasma of a hydrogen gas and an oxygen gas.

23. The method for manufacturing the semiconductor device according to claim 18 , wherein the fourth insulating layer overlaps with a part of the second conductive layer.

24. The method for manufacturing the semiconductor device according to claim 18 , wherein an uppermost layer of the first insulating layer comprises a silicon nitride layer or a silicon nitride oxide layer.

25. The method for manufacturing the semiconductor device according to claim 24 , further comprising the step of exposing the first insulating layer to plasma generated by a N 2 O gas.

26. The method for manufacturing the semiconductor device according to claim 18 , further comprising the step of exposing a side surface of the thin film layered body to oxygen plasma or nitrogen plasma.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2011
From: MIYAIRI, HIDEKAZU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 026771/0240 →
Priority Claims (1)
JP 2010-189927 · Aug 26, 2010 · national
Continuity (1)
Related Publication 20120049190A1 · Mar 1, 2012