IP Library Patent Application 13222150
Patent Application
App. No. 13/222,150

SEMICONDUCTOR DEVICE PACKAGING HAVING PRE-ENCAPSULATION THROUGH VIA FORMATION

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Quick Facts
Patent No.
US None
App. No.
13/222,150
Abstract

A method for forming signal conduits before encapsulation for incorporation as through vias in a semiconductor device package is provided. One or more signal conduits are formed through photolithography and metal deposition on a metal film or substrate. After removing photoresistive material, the semiconductor device package is built by encapsulating the signal conduits along with any semiconductor die and other parts of the package. The ends of the signal conduits are exposed and the signal conduits can then be used as through vias, providing signal-bearing pathways between interconnects or contacts on the bottom and top of the package, and electrical contacts of the semiconductor die. Using this method, signal conduits can be provided in a variety of geometric placings in the semiconductor device package. A semiconductor device package including the signal conduits made from the above method is also provided.

Claims (57)

1 . A method for packaging an electronic device assembly, the method comprising:

providing a substrate;

forming one or more signal conduits on the substrate, wherein a first end of each signal conduit contacts the substrate;

forming an encapsulant over and around sides of the one or more signal conduits; and

exposing a second end of each signal conduit of the one or more signal conduits, wherein each signal conduit forms a conductive via through the electronic device assembly.

2 . The method of claim 1 further comprising:

exposing the first end of each signal conduit of the one or more signal conduits by removing the substrate from the one or more signal conduits and the encapsulant.

3 . The method of claim 2 , wherein

said removing the substrate comprises etching the substrate, and

the substrate is a metal film.

4 . The method of claim 1 wherein said forming the one or more signal conduits comprises:

forming a photoresist layer on the substrate;

forming one or more openings in the photoresist layer corresponding to where the one or more signal conduits are desired;

depositing a conductive material in the openings in the photoresist layer; and

stripping the photoresist layer from the substrate.

5 . The method of claim 1 wherein said exposing the second end of each signal conduit comprises controlling said forming the encapsulant to a thickness less than or equal to a length of the signal conduits.

6 . The method of claim 1 further comprising:

placing a first electronic device on the substrate in an area for the electronic device assembly, wherein

said forming the encapsulant further comprises forming the encapsulant over and around sides of the first electronic device.

7 . The method of claim 6 further comprising:

removing the substrate from the encapsulant, the one or more signal conduits, and the first electronic device, after said forming the encapsulant, wherein

said removing exposes the first end of the one or more signal conduits and electrical contacts of the first electronic device.

8 . The method of claim 7 further comprising:

forming, after said removing the substrate, a first interconnect structure on a first side of the electronic device assembly, wherein the first interconnect structure couples a first contact on the first electronic device to a signal conduit of the one or more signal conduits.

9 . The method of claim 1 further comprising:

forming, after said exposing the second end of the one or more signal conduits, an interconnect structure on a side of the electronic device assembly having the second end of the signal conduits, wherein the interconnect structure is coupled to one or more of the signal conduits.

10 . The method of claim 9 wherein the second interconnect structure is configured to receive a second electronic device assembly.

11 . The method of claim 1 further comprising:

placing a second electronic device assembly on the exposed second end of one or more signal conduits such that the second electronic device assembly is electrically coupled to the one or more signal conduits.

12 . A packaged device assembly comprising:

an electronic device;

one or more conductive vias extending from a top surface of the packaged device assembly to a bottom surface of the packaged device assembly; and

encapsulant over and around the electronic device and around the conductive vias and forming an encapsulated region of the packaged device assembly, wherein

the one or more conductive vias are formed using corresponding signal conduits, and

each signal conduit is formed before encapsulating the electronic device and signal conduits, and

forming each signal conduit comprises patterning openings in a photoresist layer on a substrate, depositing a conductive material in the openings in the photoresist layer, and stripping the photoresist layer from the substrate.

13 . The packaged device assembly of claim 12 further comprising:

a first interconnect structure on a first side of the electronic device assembly, wherein the first interconnect structure couples a first contact on the first electronic device to a signal conduit of the one or more signal conduits.

14 . The packaged device assembly of claim 13 further comprising:

a second interconnect structure on a second side of the electronic device assembly, wherein the second interconnect structure is coupled to the signal conduit and the signal conduit electrically couples the first interconnect structure and the second interconnect structure.

15 . The packaged device assembly of claim 14 wherein the second interconnect structure is configured to receive a second electronic device assembly.

16 . A method for packaging an electronic device assembly, the method comprising:

forming a photoresist layer on a metal film;

forming one or more openings in the photoresist layer, wherein the one or more openings extend from the surface of the photoresist layer to the metal film;

depositing a conductive material in the openings in the photoresist layer to form corresponding one or more signal conduits;

stripping the photoresist layer from the metal film; and

forming an encapsulant over and around sides of the one or more signal conduits and over the metal film.

17 . The method of claim 16 further comprising:

placing an electronic device on the metal film in an area for the electronic device assembly, after said stripping the photoresist layer from the metal film; and

forming the encapsulant over and around sides of the electronic device.

18 . The method of claim 17 further comprising:

removing the metal film to expose a first end of the one or more signal conduits and an active surface of the electronic device.

19 . The method of claim 18 further comprising:

exposing a second end of the one or more signal conduits, wherein said exposing the second end comprises removing a portion of the encapsulant from the electronic device assembly.

20 . The method of claim 19 wherein said removing the portion of the encapsulant comprises one of:

grinding the encapsulant from the electronic device assembly to a depth at least matching the second end of the signal conduits; and

laser ablating the encapsulant from the electronic device assembly to a depth at least matching the second end of the signal conduits.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2011
From: GONG, ZHIWEI; CHHABRA, NAVJOT; DAVES, GLENN G.; HAYES, SCOTT M.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 026838/0406 →