Liquid crystal display device
View Patent ↗In a liquid crystal display device of IPS mode with a smaller number of layers, a gate electrode is formed on a TFT substrate. A gate insulating film is formed to cover the gate electrode, on which a semiconductor layer is formed. A drain electrode and a source electrode are placed on the semiconductor layer. A planar pixel electrode is formed from ITO on the gate insulating film prior to the formation of the drain electrode, source electrode, image signal line, and the like. This process is performed to prevent the image signal line, the drain electrode, the source electrode, and the like, from being consumed by the cell reaction through a developer during the patterning of the ITO when a pin hole is present in the ITO, in order not to cause disconnection. As a result, it is possible to improve the production yield and achieve high reliability.
1. A liquid crystal display device comprising:
a TFT substrate;
a counter substrate; and
a liquid crystal layer interposed between the TFT substrate and the counter substrate,
wherein a gate electrode, a gate insulating film, and a semiconductor layer are formed on the TFT substrate in this order,
wherein a drain electrode and a source electrode are formed on the semiconductor layer,
wherein a pixel electrode is formed on the gate insulating film,
wherein an insulating film is formed on the pixel electrode,
wherein a common electrode is formed on the insulating film,
wherein one of the source electrode and the drain electrode is directly laminated on a portion of the pixel electrode after the pixel electrode has been patterned by a developer to prevent the source electrode or the drain electrode from being etched by a cell reaction between the pixel electrode and the drain electrode or the source electrode due to the presence of the developer.
2. The liquid crystal display device according to claim 1 ,
wherein the source electrode is formed from MoCr alloy.
3. The liquid crystal display device according to claim 1 ,
wherein a leader formed on the same layer as the gate electrode extends in a terminal portion, and
wherein the ITO formed on the same layer as the common electrode is laminated onto the leader.
4. The liquid crystal display device according to claim 1 ,
wherein a leader formed on the same layer as the source electrode extends in a terminal portion, and
wherein the ITO formed on the same layer as the common electrode is laminated onto the leader.
5. A method of forming a liquid crystal display device which device comprises:
a TFT substrate;
a counter substrate; and
a liquid crystal layer interposed between the TFT substrate and the counter substrate,
wherein a gate electrode, a gate insulating film, and a semiconductor layer are formed on the TFT substrate in this order,
wherein a drain electrode and a source electrode are formed on the semiconductor layer,
wherein a pixel electrode is formed in the gate insulating film,
wherein an insulating film is formed on the pixel electrode,
wherein a common electrode is formed on the insulating film,
wherein the method comprises:
patterning the pixel electrode by a developer; and
laminating one of the source electrode and the drain electrode directly on a portion of the pixel electrode after the pixel electrode has been patterned by the developer to prevent the source electrode or the drain electrode from being etched by a cell reaction between the pixel electrode and the drain electrode or the source electrode due to the presence of the developer.
6. The liquid crystal display device according to claim 5 ,
wherein the source electrode is formed from MoCr alloy.
7. The liquid crystal display device according to claim 5 ,
wherein a leader formed on the same layer as the gate electrode extends in a terminal portion, and
wherein the ITO formed on the same layer as the common electrode is laminated onto the leader.
8. The liquid crystal display device according to claim 5 ,
wherein a leader formed on the same layer as the source electrode extends in a terminal portion, and
wherein the ITO formed on the same layer as the common electrode is laminated onto the leader.