IP Library Granted Patent US 9,502,382
Granted Patent B2
US 9,502,382 · App. 13/245,389 · Granted Nov 22, 2016

Coplaner waveguide transition

Inventors: Young Seek Cho (West Lafayette, IN); Rhonda Rene Franklin (Falcon Heights, MN)
Assignee: Regents of the University of Minnesota
H01L25/0657H01P1/047H01P5/022H01P11/003H01L23/5384H01L24/16H01L2223/6616H01L2223/6633H01L2223/6683H01L2224/131H01L2224/16225H01L2224/16227H01L2224/17181H01L2225/06572
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Quick Facts
Patent No.
US 9,502,382
App. No.
13/245,389
Granted
Nov 22, 2016
Kind
B2
Abstract

A coplanar waveguide transition includes a substrate, a first coplanar waveguide on a first side of the substrate, and a second coplanar waveguide on a second side of the substrate. The coplanar waveguide transition includes a first, a second, and a third via through the substrate electrically coupling the first coplanar waveguide to the second coplanar waveguide. The coplanar waveguide transition includes voids through the substrate between the first, second, and third vias and edges of the first coplanar waveguide and edges of the second coplanar waveguide.

Claims (62)

1. A coplanar waveguide transition comprising:

a substrate;

a first coplanar waveguide on a first side of the substrate;

a second coplanar waveguide on a second side of the substrate;

a first, a second, and a third via through the substrate electrically coupling the first coplanar waveguide to the second coplanar waveguide; and

voids through the substrate between the first, second, and third vias and edges of the first coplanar waveguide and edges of the second coplanar waveguide,

wherein the voids comprise:

a first void between the first via and the second via;

a second void between the second via and the third via;

a third void between the first via and an edge of the first coplanar waveguide and an edge of the second coplanar waveguide; and

a fourth void between the third via and an edge of the first coplanar waveguide and an edge of the second coplanar waveguide.

2. The coplanar waveguide transition of claim 1 , wherein the first and second voids each have a first volume and the third and fourth voids each have a second volume different from the first volume.

3. The coplanar waveguide transition of claim 1 , further comprising:

a first, a second, and a third via pad on the first side of the substrate, each of the first, second, and third via pads on the first side of the substrate electrically coupled to a respective edge of the first coplanar waveguide; and

a first, a second, and a third via pad on the second side of the substrate, each of the first, second, and third via pads on the second side of the substrate electrically coupled to a respective edge of the second coplanar waveguide.

4. The coplanar waveguide transition of claim 1 , wherein the first coplanar waveguide comprises:

a first ground plane;

a second ground plane; and

a first signal line between and running parallel to the first ground plane and the second ground plane.

5. The coplanar waveguide transition of claim 1 , wherein the substrate comprises silicon.

6. The coplanar waveguide transition of claim 1 , wherein the first coplanar waveguide, the second coplanar waveguide, and the first, second, and third vias each comprise gold.

7. The coplanar waveguide transition of claim 1 , wherein the coplanar waveguide transition is configured to operate at a bandwidth of up to 110 GHz.

8. A coplanar waveguide transition comprising:

a substrate;

a first ground plane and a second ground plane on a first side of the substrate;

a first signal line on the first side of the substrate, the first signal line between the first ground plane and the second ground plane;

a third ground plane and a fourth ground plane on a second side of the substrate opposite the first side;

a second signal line on the second side of the substrate, the second signal line between the third ground plane and the fourth ground plane;

a first via through the substrate electrically coupling the first signal line to the second signal line;

a second via through the substrate electrically coupling the first ground plane to the third ground plane;

a third via through the substrate electrically coupling the second ground plane to the fourth ground plane;

a first void through the substrate between the first via and the second via;

a second void through the substrate between the first via and the third via;

a third void through the substrate between the second via and an edge of the first ground plane and an edge of the third ground plane; and

a fourth void through the substrate between the third via and an edge of the second ground plane and an edge of the fourth ground plane.

9. The coplanar waveguide transition of claim 8 , wherein the first, second, and third vias are hollow.

10. The coplanar waveguide transition of claim 8 , wherein the first void, the second void, the third void, and the fourth void each extend from the first side of the substrate to the second side of the substrate.

11. The coplanar waveguide transition of claim 8 , wherein the substrate comprises silicon.

12. The coplanar waveguide transition of claim 8 , wherein the first and second signal lines, the first, second, third, and fourth ground planes, and the first, second, and third vias each comprise gold.

13. The coplanar waveguide transition of claim 8 , wherein the coplanar waveguide transition is configured to operate at a bandwidth of up to 110 GHz.

14. The coplanar waveguide transition of claim 8 , wherein a first distance between the first via and the second via and a second distance between the first via and the third via determines a characteristic impedance value of the coplanar waveguide transition.

15. The coplanar waveguide transition of claim 8 , wherein the substrate has a thickness up to 200 μm.

16. A semiconductor device comprising:

a first semiconductor chip;

a second semiconductor chip; and

a coplanar waveguide transition electrically coupling the first semiconductor chip to the second semiconductor chip, the coplanar waveguide transition comprising:

a substrate;

a first coplanar waveguide on a first side of the substrate, the first coplanar waveguide electrically coupled to the first semiconductor chip;

a second coplanar waveguide on a second side of the substrate, the second coplanar waveguide electrically coupled to the second semiconductor chip;

a first, a second, and a third via through the substrate electrically coupling the first coplanar waveguide to the second coplanar waveguide; and

voids through the substrate between the first, second, and third vias and edges of the first coplanar waveguide and edges of the second coplanar waveguide,

wherein the voids comprise:

a first void between the first via and the second via;

a second void between the second via and the third via;

a third void between the first via and an edge of the first coplanar waveguide and an edge of the second coplanar waveguide; and

a fourth void between the third via and an edge of the first coplanar waveguide and an edge of the second coplanar waveguide.

17. The semiconductor device of claim 16 , further comprising:

first solder balls electrically coupling the first coplanar waveguide to the first semiconductor chip; and

second solder balls electrically coupling the second coplanar waveguide to the second semiconductor chip.

18. The semiconductor device of claim 16 , wherein the first semiconductor chip comprises a first redistribution layer electrically coupled to the first coplanar waveguide, and

wherein the second semiconductor chip comprises a second redistribution layer electrically coupled to the second coplanar waveguide.

19. The semiconductor device of claim 16 , wherein the coplanar waveguide transition is configured to operate at a bandwidth of up to 110 GHz.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2011
From: CHO, YOUNG SEEK; FRANKLIN, RHONDA RENE
To: REGENTS OF THE UNIVERSITY OF MINNESOTA
Reel/Frame 027372/0511 →
Continuity (1)
Related Publication 20130075904A1 · Mar 28, 2013