Generating compiled code that indicates register liveness
View Patent ↗Object code is generated from an internal representation that includes a plurality of source operands. The generating includes performing for each source operand in the internal representation determining whether a last use has occurred for the source operand. The determining includes accessing a data flow graph to determine whether all uses of a live range have been emitted. If it is determined that a last use has occurred for the source operand, an architected resource associated with the source operand is marked for last-use indication. A last-use indication is then generated for the architected resource. Instructions and the last-use indications are emitted into the object code.
1. A method for indicating register liveness status in compiled code comprising:
generating, by a compiler, object code from a plurality of instructions in an internal representation (IR), the generating comprising, for each of the IR instructions:
determining whether a source operand of the IR instruction represents a last-use of a register, the determining comprising accessing a data flow graph to determine whether object code instructions for all other uses of a live range have been emitted by the compiler; and
emitting an object code instruction generated from the IR instruction, and a last-use indication associated with the generated object code instruction, into the object code in response to determining that the source operand represents a last-use of a register and that a cost metric exceeds a threshold, the cost metric comprising a number of IR instructions until a subsequent write to the register.
2. The method of claim 1 , wherein emitting the last-use indication associated with the generated object code instruction comprises modifying the generated object code instruction to include the last-use indication.
3. The method of claim 2 , wherein the modifying comprises modifying the generated object code instruction to include at least one of a modified instruction opcode, a flag associated with the register as one of an instruction prefix or an instruction postfix, and a mask including a bit associated with the register as one of an instruction prefix or an instruction postfix.
4. The method of claim 1 , wherein emitting the last-use indication associated with the generated object code instruction comprises emitting a separate instruction as one of a prefix instruction or a postfix instruction.
5. The method of claim 1 , wherein the threshold is pre-calculated based on at least one of a cost of issuing the last-use indication when the generated object code is executed and a cost re-allocating a released register.
6. The method of claim 1 , wherein the cost metric is a cumulative cost metric for a plurality of last-use determinations corresponding to a plurality of registers.
7. A system comprising a processor and a memory storing instructions which, when executed by the processor, perform a method for indicating register liveness status in compiled code comprising:
generating, by a compiler, object code from a plurality of instructions in an internal representation (IR), the generating comprising, for each of the IR instructions:
determining whether a source operand of the IR instruction represents a last-use of a register, the determining comprising accessing a data flow graph to determine whether object code instructions for all other uses of a live range have been emitted by the compiler; and
emitting an object code instruction generated from the IR instruction, and a last-use indication associated with the generated object code instruction, into the object code in response to determining that the source operand represents a last-use of a register and that a cost metric exceeds a threshold, the cost metric comprising a number of IR instructions until a subsequent write to the register.
8. The system of claim 7 , wherein emitting the last-use indication associated with the generated object code instruction comprises modifying the generated object code instruction to include the last-use indication.
9. The system of claim 8 , wherein the modifying comprises modifying the generated object code instruction to include at least one of a modified instruction opcode, a flag associated with the register as one of an instruction prefix or an instruction postfix, and a mask including a bit associated with the register as one of an instruction prefix or an instruction postfix.
10. The system of claim 7 , wherein emitting the last-use indication associated with the generated object code instruction comprises emitting a separate instruction as one of a prefix instruction or a postfix instruction.
11. The system of claim 7 , wherein the threshold is pre-calculated based on at least one of a cost of issuing the last-use indication when the generated object code is executed and a cost re-allocating a released register.
12. The system of claim 7 , wherein the cost metric is a cumulative cost metric for a plurality of last-use determinations corresponding to a plurality of registers.
13. A computer program product comprising a tangible computer-readable storage medium storing instructions which, when executed by a processor, perform a method for indicating register liveness status in compiled code comprising:
generating, by a compiler, object code from a plurality of instructions in an internal representation (IR), the generating comprising, for each of the IR instructions:
determining whether a source operand of the IR instruction represents a last-use of a register, the determining comprising accessing a data flow graph to determine whether object code instructions for all other uses of a live range have been emitted by the compiler; and
emitting an object code instruction generated from the IR instruction, and a last-use indication associated with the generated object code instruction, into the object code in response to determining that the source operand represents a last-use of a register and that a cost metric exceeds a threshold, the cost metric comprising a number of IR instructions until a subsequent write to the register.
14. The computer program product of claim 13 , wherein emitting the last-use indication associated with the generated object code instruction comprises modifying the generated object code instruction to include the last-use indication.
15. The computer program product of claim 14 , wherein the modifying comprises modifying the generated object code instruction to include at least one of a modified instruction opcode, a flag associated with the register as one of an instruction prefix or an instruction postfix, and a mask including a bit associated with the register as one of an instruction prefix or an instruction postfix.
16. The computer program product of claim 13 , wherein emitting the last-use indication associated with the generated object code instruction comprises emitting a separate instruction as one of a prefix instruction or a postfix instruction.
17. The computer program product of claim 13 , wherein the threshold is pre-calculated based on at least one of a cost of issuing the last-use indication when the generated object code is executed and a cost re-allocating a released register.
18. The computer program product of claim 13 , wherein the cost metric is a cumulative cost metric for a plurality of last-use determinations corresponding to a plurality of registers.