Speech recognition circuit using parallel processors
A speech recognition circuit comprises a memory containing lexical data for word recognition, the lexical data comprising a plurality of lexical data structures stored in each of a plurality of parts of the memory; and a parallel processor structure connected to the memory to process speech parameters by performing parallel processing on a plurality of the lexical data structures.
1. A speech recognition circuit comprising:
a memory containing lexical data for word recognition, the lexical data comprising a plurality of lexical data structures stored in each of a plurality of parts of the memory; and
a parallel processor structure connected to the memory to process speech parameters by performing parallel processing on a plurality of the lexical data structures.
2. A speech recognition method comprising:
storing lexical data for word recognition, the lexical data comprising a plurality of lexical data structures stored in each of a plurality of parts of the memory; and
processing speech parameters by performing parallel processing on a plurality of the lexical data structures.