Method for producing a metallization having two multiple alternating metallization layers for at least one contact pad and semiconductor wafer having said metallization for at least one contact pad
The invention relates to a method for producing a metallization for at least one contact pad and a semiconductor wafer having metallization for at least one contact pad. The invention relates to a metallization (and a semiconductor wafer having corresponding metallization) and to a method for the production thereof that first of all can be produced by means of physical gas phase separation (dry separation) and secondly ensures sufficient adhesion of a lot bump. The method for producing a metallization ( 40 ) for at least one contact pad ( 20 ) according to the invention comprises the following process steps: applying at least one contact pad ( 20 ) to a substrate ( 10 ), applying a barrier layer ( 30 ) to the top side of the at least one contact pad ( 20 ) and applying a metallization ( 40 ) to the top side of the barrier layer ( 30 ), characterized in that the barrier layer ( 30 ) and the metallization ( 40 ) are applied by means of physical separation and that the metallization ( 40 ) is designed as a layer structure having two multiple alternating metallization layers ( 41, 42 ), wherein the first metallization layer ( 41 ) is made of nickel or an Ni alloy having a layer thickness of less than 500 nm and the second metallization layer ( 42 ) is made of a material that is different than nickel and is electrically conductive.
1. Method for producing a metallization ( 40 ) for at least one contact pad ( 20 ) with the following method steps:
using a mask for depositing at least one contact pad ( 20 ) on a substrate ( 10 ),
using said mask for depositing a barrier layer ( 30 ) on the top surface of the at least one contact pad ( 20 ),
depositing a metallization ( 40 ) on the top surface of the barrier layer ( 30 ), wherein the barrier layer ( 30 ) and the metallization ( 40 ) are deposited by physical deposition, and wherein the metallization ( 40 ) is formed as a layer structure comprising first metallization layers ( 41 ) alternating with second metallization layers ( 42 ) wherein each first metallization layer ( 41 ) is formed of nickel or a nickel alloy having a layer thickness less than 1 μm and each second metallization layer ( 42 ) is formed of an electrically conducting, ductile material that is different from nickel or a nickel alloy.
2. Method according to claim 1 ,
characterized in that
the second metallization layer ( 42 ) is formed of a metal selected from the group consisting of gold, silver, platinum, copper, iron, aluminum, zinc, tin and lead, a mixture of at least two of the aforementioned metals or an alloy of the aforementioned metals.
3. Method according to claim 1 ,
characterized in that
the second metallization layer ( 42 ) is made of a material having a ductility corresponding to at least 60% of the ductility of gold, and an electrical conductivity corresponding to at least 10% of the electrical conductivity of gold.
4. Method according to claim 1 ,
characterized in that
the second metallization layer ( 42 ) is formed with a layer thickness between 10-200 nm.
5. Method according to claim 1 ,
characterized in that
the contact pad ( 20 ) is deposited by physical deposition.
6. Method according to claim 5 ,
characterized in that
the contact pad ( 20 ) and the barrier layer ( 30 ) are deposited by evaporation or sputtering.
7. Method according to claim 1 ,
characterized in that
the first metallization layer ( 41 ) is formed with a layer thickness of less than 500 nm.
8. Method according to claim 1 ,
characterized in that
the first metallization layer ( 41 ) is formed with a layer thickness of less than 200 nm and the second metallization layer ( 42 ) of gold is formed with a layer thickness between 20-60 nm.
9. Semiconductor wafer with a metallization ( 40 ) for at least one contact pad ( 20 ), comprising:
at least one contact pad ( 20 ) arranged on a semiconductor wafer ( 10 ),
a barrier layer ( 30 ) arranged on the top surface of the at least one contact pad ( 20 ) and completely surrounding the at least one contact pad ( 20 ),
a metallization structure ( 40 ) arranged on the top surface of the barrier layer ( 30 ), wherein the metallization structure ( 40 ) has a layer structure comprising first metallization layers ( 41 ) alternating with second metallization layers ( 42 ), wherein each first metallization structure ( 41 ) is formed of nickel or a nickel alloy with a layer thickness of less than 1 μm and each second metallization layer ( 42 ) is formed of an electrically conducting material which is different from nickel or a nickel alloy, characterized in that
the second metallization layer ( 42 ) is made of a ductile material.
10. Semiconductor wafer according to claim 9 ,
characterized in that
the second metallization layer ( 42 ) is made of a material having a ductility corresponding to at least 60% of the ductility of gold, and an electrical conductivity corresponding to at least 10% of the electrical conductivity of gold.
11. Semiconductor wafer according to claim 9 ,
characterized in that
the second metallization layer ( 42 ) is formed with a layer thickness between 10-200 nm.
12. Semiconductor wafer according to claim 9 ,
characterized in that
the first metallization layer ( 41 ) is formed with a layer thickness of less than 500 nm.
13. Semiconductor wafer according to claim 9 ,
characterized in that
the first metallization layer ( 41 ) is formed with a layer thickness of less than 200 nm and the second metallization layer ( 42 ) of gold is formed with a layer thickness between 20-60 nm.
14. Semiconductor wafer according to claim 9 ,
characterized in that
the metallization structure ( 40 ) comprises at least one of the first metallization layer ( 41 ) interposed between two of the second metallization layers ( 42 ).
15. Semiconductor wafer according to claim 9 ,
characterized in that
the metallization structure ( 40 ) comprises at least five of the first metallization layers ( 41 ) each interposed between a different pair of the second metallization layers ( 42 ).
16. Semiconductor wafer according to claim 9 ,
characterized in that
the number of the first metallization layers ( 41 ) is selected such that the sum of the layer thicknesses of the first metallization layers ( 41 ) is greater than 2 μm.
17. Semiconductor wafer according to claim 9 ,
characterized in that
the semiconductor wafer ( 10 ) comprises at least one hundred contact path ( 20 ) and/or the semiconductor wafer ( 10 ) has a semiconductor chip and/or the semiconductor wafer ( 10 ) has a microelectronic circuit.