Method for fabricating semiconductor device and plasma doping apparatus
View Patent ↗After a fin-semiconductor region ( 13 ) is formed on a substrate ( 11 ), impurity-containing gas and oxygen-containing gas are used to perform plasma doping on the fin-semiconductor region ( 13 ). This forms impurity-doped region ( 17 ) in at least side portions of the fin-semiconductor region ( 13 ).
1. A method for fabricating a semiconductor device, comprising the steps of:
(a) forming a fin-semiconductor region on a substrate; and
(b) performing plasma doping on the fin-semiconductor region by using impurity-containing gas and oxygen-containing gas, thereby forming an impurity-doped region in at least side portions of the fin-semiconductor region,
wherein, at step (b), after the oxygen-containing gas is used to perform first plasma doping on the fin-semiconductor region, the impurity-containing gas is used to perform second plasma doping on the fin-semiconductor region, thereby forming the impurity-doped region in the side portions of the fin-semiconductor region.
2. The method of claim 1 , wherein the first plasma doping and the second plasma doping are performed in the same chamber.
3. The method of claim 1 , wherein the first plasma doping and the second plasma doping are performed in different chambers.
4. The method of claim 1 , wherein the impurity-containing gas is AsH 3 .
5. The method of claim 1 , wherein the impurity-containing gas is diluted with dilution gas.
6. The method of claim 5 , wherein the dilution gas is He.
7. The method of claim 1 , wherein the oxygen-containing gas is at least one of O 2 , H 2 O, N 2 O, or CO 2 .
8. The method of claim 1 , wherein the oxygen-containing gas is diluted with dilution gas.
9. The method of claim 8 , wherein the dilution gas is He.
10. The method of claim 1 , further comprising the step of:
after step (a) and before step (b), forming a gate electrode so as to cover part of the fin-semiconductor region adjacent to the impurity-doped region,
wherein the impurity-doped region is an extension region.
11. The method of claim 1 , further comprising the steps of:
after step (a) and before step (b), forming a gate electrode so as to cover part of the fin-semiconductor region apart from the impurity-doped region, and forming an insulating sidewall-spacer so as to cover part of the fin-semiconductor region positioned between the impurity-doped region and the gate electrode and cover a side surface of the gate electrode,
wherein the impurity-doped region is a source/drain region.
12. The method of claim 1 , further comprising the step of:
after step (b), performing activation heat treatment on the impurity-doped region.
13. A method for fabricating a semiconductor device, comprising the steps of:
(a) forming a fin-semiconductor region on a substrate; and
(b) performing plasma doping on the fin-semiconductor region by using impurity-containing gas and oxygen-containing gas, thereby forming an impurity-doped region in at least side portions of the fin-semiconductor region,
wherein, at step (b), after the impurity-doped region is formed in the side portions of the fin-semiconductor region by using the impurity-containing gas to perform first plasma doping on the fin-semiconductor region, the oxygen-containing gas is used to perform second plasma doping on the fin-semiconductor region.
14. The method of claim 13 , wherein the first plasma doping and the second plasma doping are performed in the same chamber.
15. The method of claim 13 , wherein the first plasma doping and the second plasma doping are performed in different chambers.
16. The method of claim 13 , wherein the impurity-containing gas is AsH 3 .
17. The method of claim 13 , wherein the impurity-containing gas is diluted with dilution gas.
18. The method of claim 17 , wherein the dilution gas is He.
19. The method of claim 13 , wherein the oxygen-containing gas is at least one of O 2 , H 2 O, N 2 O, or CO 2 .
20. The method of claim 13 , wherein the oxygen-containing gas is diluted with dilution gas.
21. The method of claim 20 , wherein the dilution gas is He.
22. The method of claim 13 , further comprising the step of:
after step (a) and before step (b), forming a gate electrode so as to cover part of the fin-semiconductor region adjacent to the impurity-doped region,
wherein the impurity-doped region is an extension region.
23. The method of claim 13 , further comprising the steps of:
after step (a) and before step (b), forming a gate electrode so as to cover part of the fin-semiconductor region apart from the impurity-doped region, and forming an insulating sidewall-spacer so as to cover part of the fin-semiconductor region positioned between the impurity-doped region and the gate electrode and cover a side surface of the gate electrode,
wherein the impurity-doped region is a source/drain region.
24. The method of claim 13 , further comprising the step of:
after step (b), performing activation heat treatment on the impurity-doped region.