Circuits and methods for reducing noise in the power supply of circuits coupled to a bidirectional bus
View Patent ↗Circuits and methods for reducing noise in the power supply of circuits coupled to a bidirectional bus are presented. The circuits and methods are responsive to an idle condition on the bidirectional bus. The control signal is applied to and changes an electrical characteristic within the receiver to generate a voltage offset. The voltage offset prevents unintended voltage transitions in the power supply of circuits coupled to the bidirectional bus from generating a signal transition on an output signal connection of the receiver.
1. An input/output interface for communicating with a double data rate (DDR) memory device, the interface comprising:
a state machine operating in multiple clock domains in accordance with both synchronous and asynchronous inputs, the state machine comprising a first state defining a strobe park condition and each of a second state, a third state and a fourth state defining active strobe conditions, the state machine generating a control signal responsive to the first state; and
a receiver coupled to a bidirectional bus and arranged to receive the control signal at an active circuit element coupled in parallel with an input transistor of a differential amplifier, wherein application of the control signal introduces a voltage offset in the receiver.
2. The input/output interface of claim 1 , wherein the active circuit element comprises a switch coupled in series with a resistor.
3. The input/output interface of claim 1 , wherein the active circuit element comprises a metal-oxide semiconductor field-effect transistor.
4. The input/output interface of claim 3 , wherein the metal-oxide semiconductor field-effect transistor is arranged in parallel with a resistor and the resistor is coupled in a branch of a differential amplifier.
5. A receiver circuit, comprising;
a first branch of a differential amplifier including a reference input connection;
a second branch of the differential amplifier coupled to the first branch of the differential amplifier by a current source, the second branch of the differential amplifier including a signal connection;
an active element coupled in parallel with a resistor to one of the first branch of the differential amplifier and the second branch of the differential amplifier, the active element receiving a control signal that when applied to the active element adjusts an electrical characteristic in one of the first branch and the second branch of the differential amplifier.
6. The receiver circuit of claim 5 , wherein the resistor is in series with the first branch of the differential amplifier.
7. The receiver circuit of claim 5 , wherein the resistor is in series with the second branch of the differential amplifier.
8. The receiver circuit of claim 5 , wherein the active element is a metal-oxide semiconductor field-effect transistor.
9. The receiver circuit of claim 5 , wherein the active element is coupled in parallel with an input transistor.
10. The receiver circuit of claim 9 , wherein the input transistor is in the first branch of the differential amplifier.
11. The receiver circuit of claim 9 , wherein the input transistor is in the second branch of the differential amplifier.
12. The receiver circuit of claim 5 , wherein the active element is coupled in series with a resistor in one of the first branch or the second branch of the differential amplifier.
13. A method for reducing noise in the power supply of circuits coupled to a bidirectional bus, the method comprising:
using a state machine to activate a control signal in response to a transition from multiple states defining active strobe conditions to an idle state defining an inactive strobe condition; and
applying the control signal to an active circuit element arranged in parallel with an input transistor to introduce a voltage offset in a receiver.
14. The method of claim 13 , wherein using a state machine to activate a control signal further comprises monitoring a read data enable signal, a first counter responsive to a first-clock domain, a second counter responsive to a host-clock domain, and determining when a first counter output is equal to a second counter output.
15. The method of claim 13 , wherein applying the control signal to an active circuit element comprises applying the control signal to the gate of a metal-oxide semiconductor field effect transistor.
16. The method of claim 13 , wherein applying the control signal to an active circuit element comprises applying the control signal to a switch arranged in series with a branch of a differential amplifier.