Encapsulated phase change cell structures and methods
View Patent ↗Methods and devices associated with phase change cell structures are described herein. In one or more embodiments, a method of forming a phase change cell structure includes forming a substrate protrusion that includes a bottom electrode, forming a phase change material on the substrate protrusion, forming a conductive material on the phase change material, and removing a portion of the conductive material and a portion of the phase change material to form an encapsulated stack structure.
1. A memory cell, comprising:
a substrate protrusion having a first electrode formed therein;
a resistance variable material portion encapsulating at least a portion of the substrate protrusion such that the resistance variable material is formed on a top portion of the substrate protrusion and on a sidewall of the substrate protrusion; and
a second electrode formed on the resistance variable material portion.
2. The memory cell of claim 1 , wherein the substrate protrusion includes a first and a second sidewall covered by the resistance variable material portion.
3. The memory cell of claim 2 , wherein the resistance variable material portion includes a first and a second sidewall at least partially covered by the second electrode.
4. The memory cell of claim 1 , wherein the second electrode at least partially encapsulates the phase change material.
5. The memory cell of claim 1 , wherein the first electrode is coupled to a metal contact.
6. The memory cell of claim 5 , wherein the metal contact is coupled to an access device associated with the memory cell structure.
7. The memory cell of claim 1 , wherein the first electrode is approximately 50 nanometers (nm) in diameter.
8. The memory cell of claim 1 , wherein the resistance variable portion is approximately 100 nanometers (nm) in diameter and 100 nm in depth.
9. The memory cell of claim 1 , wherein the memory cell is isolated from adjacent memory cell structures.
10. An array of memory cells, comprising:
a first resistance variable cell stack including:
a first resistance variable material portion that encapsulates at least a portion of a first substrate protrusion having a first electrode formed therein; and
a second electrode formed on the first resistance variable material portion; and
a second resistance variable cell stack adjacent the first resistance variable cell stack and including:
a second resistance variable material portion that encapsulates at least a portion of a second substrate protrusion having a third electrode formed therein; and
a fourth electrode formed on the second resistance variable material portion;
wherein the first resistance variable material portion is formed on a sidewall of the first substrate protrusion and the second resistance variable material portion is formed on a sidewall of the second substrate protrusion.
11. The array of claim 10 , wherein the second electrode at least partially encapsulates the first resistance variable material portion.
12. The array of claim 11 , wherein the fourth electrode at least partially encapsulates the second resistance variable material portion.
13. The array of claim 10 , wherein at least one of the first electrode and the third electrode is coupled to a metal contact.
14. The array of claim 10 , wherein the first substrate protrusion and the second substrate protrusion are formed of a common substrate material, and wherein a height of the first and the second substrate protrusions is defined by an etched depth of the common substrate material.
15. The array of claim 14 , wherein the common substrate material is a dielectric material.
16. The array of claim 10 , wherein the first and the third electrodes are bottom electrodes, and wherein the second and the fourth electrodes are top electrodes.
17. The array of claim 10 , wherein the second electrode is formed directly on the first resistance variable material portion.
18. The array of claim 10 , wherein the second electrode is coupled to a bit line corresponding to the first resistance variable material cell stack.
19. A memory cell, comprising:
a substrate protrusion having a bottom electrode formed therein, wherein a top surface of the substrate protrusion is even with a top surface of the bottom electrode;
a resistance variable material formed on the top surface of the bottom electrode, the top surface of the substrate protrusion, and a sidewall of the substrate protrusion; and
a top electrode formed on a top surface of the resistance variable material and a sidewall of the resistance variable material.
20. The memory cell of claim 19 , wherein the substrate protrusion is a non-etched portion of a substrate material.