IP Library Granted Patent US 8,867,568
Granted Patent B2
US 8,867,568 · App. 13/284,447 · Granted Oct 21, 2014

Method for parsing network packets having future defined tags

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Quick Facts
Patent No.
US 8,867,568
App. No.
13/284,447
Granted
Oct 21, 2014
Kind
B2
Abstract

Disclosed herein is a method allowing an existing or legacy network device to recognize and parse packets defined in accordance with future-defined standards without having to be re-configured to be compatible with such standards. In particular, the device can skip past unknown or newly-inserted fields, such as tag headers in a tagged packet, to parse and process the remainder of the packet. By skipping those added fields such as a tag header, the device can accommodate various future-defined standards without incurring additional engineering or design costs or compromising packet processing efficiency.

Claims (33)

1. A method for parsing a packet, comprising:

reading a first portion of the packet:

determining the first portion contains a tag header type that indicates at least a tag header is inserted in the packet, wherein the tag header is not part of the first portion and the tag header type is associated with a tag header length of the tag; and

bypassing without reading the tag header inserted in the packet, based on the tag header length associated with the tag header type, to identify and read a remaining portion of the packet.

2. The method according to claim 1 , further comprising storing one or more tag header lengths in programmable registers of a device receiving the packet.

3. The method according to claim 2 , wherein the programmable registers can be dynamically updated to store a new tag header length associated with a new tag header type.

4. The method according to claim 1 , wherein the identified remaining portion of the packet includes an indication of which type of network frame is encapsulated in the packet.

5. The method according to claim 4 , further comprising offloading processing of the packet to hardware dedicated for processing the type of network frame that is encapsulated in the packet.

6. The method according to claim 1 , further comprising

reading a second portion of the identified remaining portion of the packet; determining the second portion contains an additional tag header type that indicates an additional tag header is inserted in the packet,

wherein the additional tag header is associated with an additional header length of the additional tag header; and

bypassing the additional tag header inserted in the packet based on the additional header length associated with the additional tag header type.

7. The method according to claim 1 , further comprising determining whether the first portion of the packet contains an EtherType indicating which type of network frame is encapsulated in the packet, and if so, offloading processing of the packet to hardware dedicated for processing the type of network frame.

8. The method according to claim 1 , further comprising sending the packet to a software client if the first portion of the packet does not contain any tag header type or EtherType indicating which type of network frame is encapsulated in the packet.

9. A device for parsing network packets, comprising:

a parser configured to read a first portion of a packet;

determine the first portion. contains a tag header type that indicates at least a tag header is inserted in the packet, wherein the tag header is not part of the first portion and the tag header type is associated with a tag header length of the tag; and

bypass without reading the tag header inserted in the packet, based on the tag header length associated with the tag header type, to identify and read a remaining portion of the packet.

10. The device according to claim 9 , further comprising one or more programmable registers configured for storing one or more tag header lengths.

11. The device according to claim 10 , wherein the programmable registers can be dynamically updated to store a new tag header length associated with a new tag header type.

12. The device according to claim 9 , the device incorporated into a host bus adapter (HBA).

13. The device according to claim 9 , the device incorporated into a converged network adapter (CNA).

14. The device according to claim 9 , the device incorporated into a target channel adapter (TCA).

15. The device according to claim 9 , the device incorporated into a network interface card (NIC).

16. A non-transitory computer-readable storage medium comprising processor-executable instructions, said instructions, while executed, causing a processor to:

read a first portion of a packet;

determine the first portion contains a tag header type that indicates at least a tag header is inserted it the packet, wherein the tag header is not part of the first portion and the tag header type is associated with a tag header length of the tag; and

bypass without reading the tag header inserted in the packet, based on the tag header length associated with the tag header type, to identify and read a remaining portion of the packet.

17. A network including one or more servers, at least one of the servers having a network interface card (NIC) including a device for parsing network packets comprising:

a parser configured to

read a first portion of a packet;

determine the first portion contains a tag header type that indicates at least a tag header is inserted in the packet, wherein the tag header is riot part of the first portion and the tag header type is associated with a tag header length of the tag; and

bypass without reading the tag header inserted in the packet, based on the tag header length associated with the tag header type, to identify and read a remaining portion of the packet.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2015
From: EMULEX CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 036942/0213 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2014
From: EMULEX DESIGN AND MANUFACTURING CORPORATION
To: EMULEX CORPORATION
Reel/Frame 032087/0842 →