Semiconductor device including graphene and method of manufacturing the semiconductor device
In a semiconductor device including graphene, a gate insulating layer may be formed between a gate electrode and a graphene layer, and an interlayer insulating layer may be formed under a portion of the graphene layer under which the gate insulating layer is not formed. The gate insulating layer may include a material that has higher dielectric permittivity than the interlayer insulating layer.
1. A semiconductor device comprising:
a gate electrode on a substrate;
a gate insulating layer on the gate electrode;
an interlayer dielectric layer between the substrate and the gate electrode, and on side portions of the gate electrode and the gate insulating layer, the interlayer dielectric layer including a material that has a lower dielectric permittivity than the gate insulating layer;
a graphene layer on the gate insulating layer and the interlayer dielectric layer; and
a source and a drain on the graphene layer.
2. The semiconductor device of claim 1 , wherein the gate electrode has at least one gate finger protruding from the gate electrode.
3. The semiconductor device of claim 2 , wherein the at least one gate finger is under a portion of the graphene layer between the source and the drain.
4. The semiconductor device of claim 2 , wherein the at least one gate finger is two or more gate fingers.
5. The semiconductor device of claim 4 , wherein the source and the drain are alternately formed between the two or more gate fingers on the graphene layer.
6. The semiconductor device of claim 1 , wherein a portion of the graphene layer between the source and the drain is a channel region.
7. The semiconductor device of claim 1 , wherein the semiconductor device is a radio frequency (RF) device.
8. A method of manufacturing a semiconductor device including graphene, the method comprising: forming a dielectric layer by doping a substrate with a first insulating material; forming a gate electrode and a gate insulating layer on the dielectric layer; forming an interlayer dielectric layer and exposing the gate insulating layer by doping the gate electrode and the gate insulating layer with a second insulating material; forming a graphene layer on the interlayer dielectric layer and the gate insulating layer; and forming a source and a drain on the graphene layer, wherein the gate insulating layer comprises a material that has a higher dielectric permittivity than the interlayer dielectric layer.