IP Library Granted Patent US 9,041,208
Granted Patent B2
US 9,041,208 · App. 13/287,194 · Granted May 26, 2015

Laminate interconnect having a coaxial via structure

Inventors: Adam Gallegos (Fort Collins, CO); Mark Hinton (Fort Collins, CO); Nurwati Suwendi Devnani (Fort Collins, CO); John Connor (Colorado Springs, CO)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
H01L23/49827H01L2224/73253H01L2924/15311H05K1/0222H05K1/0245H05K3/4602H05K2201/09809H01L23/49816H01L21/486H01L24/16H01L2224/16235H01L2224/29099H01L2224/131H01L2224/32245
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Quick Facts
Patent No.
US 9,041,208
App. No.
13/287,194
Granted
May 26, 2015
Kind
B2
Abstract

A laminate interconnect structure includes a core material and at least one additional layer adjacent the core material, a first electrically conductive via formed in the core material, and a second electrically conductive via formed in the core material, coaxial with the first electrically conductive via and separated from the first electrically conductive via by a non-conductive material.

Claims (39)

1. A laminate interconnect structure, comprising:

a core material with a top outer surface and a bottom outer surface and at least one additional layer adjacent the core material;

a first electrically conductive via formed in the core material, the first electrically conductive via comprising:

a top layer portion disposed on the top outer surface of the core material,

a bottom layer portion disposed on the bottom outer surface of the core material,

and a vertical portion through the core material connecting the top layer portion and the bottom layer portion;

a second electrically conductive via formed in the core material, coaxial with the first electrically conductive via and separated from the first electrically conductive via by a non-conductive material extending from the first electrically conductive via to the second electrically conductive via:

a first conductive element disposed on the top layer portion of the first electrically conductive via, the first conductive element extending through the at least one additional layer adjacent the core material; and

a second conductive element disposed on a top end of the second electrically conductive via, the second conductive element extending through the at least one additional layer adjacent the core material.

2. The laminate interconnect structure of claim 1 , wherein the first electrically conductive via and the second electrically conductive via are adapted to convey electrical power and electrical ground.

3. The laminate interconnect structure of claim 1 , wherein the first electrically conductive via and the second electrically conductive via are adapted to convey signal power and signal ground.

4. The laminate interconnect structure of claim 1 , further comprising a third electrically conductive via formed coaxial with the first electrically conductive via and the second electrically conductive coaxial via in the core material and separated from the first electrically conductive via and the second electrically conductive via by the non-conductive material.

5. The laminate interconnect structure of claim 4 , wherein the second electrically conductive via and the third electrically conductive via are adapted to convey a differential signal.

6. The laminate interconnect structure of claim 5 , wherein each of the first electrically conductive via, second electrically conductive via and third electrically conductive via are separated and electrically isolated by the non-conductive material.

7. An integrated circuit package, comprising:

a printed circuit board;

a circuit package, the circuit package having a laminate interconnect structure on which an integrated circuit chip is located, the laminate interconnect structure having a core material and at least one additional layer adjacent the core material, the laminate interconnect structure having at least one coaxial via formed therein, the coaxial via providing two electrical paths through the laminate interconnect structure to the integrated circuit chip.

8. The integrated circuit package of claim 7 , wherein the coaxial via further comprises:

a first electrically conductive via formed in the core material, the first electrically conductive via comprising:

a top layer portion disposed on a top outer surface of the core material,

a bottom layer portion disposed on a bottom outer surface of the core material,

and a vertical portion through the core material connecting the top layer portion and the bottom layer portion; and

a second electrically conductive via formed in the core material, coaxial with the first electrically conductive via and separated from the first electrically conductive via by a non-conductive material.

9. The integrated circuit package of claim 8 , wherein the first electrically conductive via and the second electrically conductive via are adapted to convey electrical power and electrical ground.

10. The integrated circuit package of claim 8 , wherein the first electrically conductive via and the second electrically conductive via are adapted to convey signal power an signal ground.

11. The integrated circuit package of claim 8 , further comprising a third electrically conductive via formed coaxial with the first electrically conductive via and the third electrically conductive coaxial via in the core material and separated from the first electrically conductive via and the third electrically conductive via by the non-conductive material.

12. The integrated circuit package of claim 11 , wherein the second electrically conductive via and the third electrically conductive via are adapted to convey a differential signal.

13. The integrated circuit package of claim 12 , wherein each of the first electrically conductive via, second electrically conductive via and third electrically conductive via are separated and electrically isolated by the non-conductive material.

14. The integrated circuit package of claim 8 , wherein the top layer portion of the first electrically conductive via is disposed on the top outer surface of the core material between the core material and the at least one additional layer adjacent the core material.

15. The integrated circuit package of claim 14 , further comprising:

a first conductive element disposed on the top layer portion of the first electrically conductive via, the first conductive element extending through the at least one additional layer adjacent the core material; and

a second conductive element disposed on a top end of the second electrically conductive via, the second conductive element extending through the at least one additional layer adjacent the core material.

16. The integrated circuit package of claim 14 , wherein the bottom layer portion of the first electrically conductive via is disposed on the bottom outer surface of the core material between the core material and a second additional layer adjacent the core material.

17. The laminate interconnect structure of claim 1 , wherein the top layer portion of the first electrically conductive via is disposed on the top outer surface of the core material between the core material and the at least one additional layer adjacent the core material.

18. The laminate interconnect structure of claim 17 , wherein the top layer portion of the first electrically conductive via is formed by plating.

19. The laminate interconnect structure of claim 17 , wherein the bottom layer portion of the first electrically conductive via is disposed on the bottom outer surface of the core material between the core material and a second additional layer adjacent the core material.

20. The laminate interconnect structure of claim 19 , further comprising:

a third conductive element disposed on the bottom layer portion of the first electrically conductive via, the third conductive element extending through the second additional layer adjacent the core material; and

a fourth conductive element disposed on a bottom end of the second electrically conductive via, the fourth conductive element extending through the second additional layer adjacent the core material.

Assignments (10)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES ENTERPRISE IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030370/0008 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2011
From: GALLEGOS, ADAM; HINTON, MARK; DEVNANI, NURWATI SUWENDI; CONNOR, JOHN
To: AVAGO TECHNOLOGIES ENTERPRISE IP (SINGAPORE) PTE. LTD. (COMPANY REGISTRATION NO. 200512336N)
Reel/Frame 027160/0549 →
Continuity (1)
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