SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT HAVING TIME CODE RECEIVER CLOCK SOURCE AND METHOD OF OPERATION THEREOF
A system-on-a-chip (SoC), a method of serving a Stratum-1 clock signal from an SoC and a device including the SoC. In one embodiment, the SoC includes: (1) a monolithic substrate, (2) a time code receiver clock source supported by the monolithic substrate and configured to receive a timing signal and generate a clock signal for the SoC and (3) at least one of a processor, memory and other SoC circuitry supported by the monolithic substrate and configured to receive the clock signal from the time code receiver clock source.
1 . A system-on-a-chip (SoC), comprising:
a monolithic substrate;
a time code receiver clock source supported by said monolithic substrate and configured to receive a timing signal and generate a clock signal for said SoC; and
at least one of a processor, memory and other SoC circuitry supported by said monolithic substrate and configured to receive said clock signal from said time code receiver clock source.
2 . The SoC as recited in claim 1 wherein a semiconductor fabrication and integration scale and technology of said time code receiver clock source is identical to said at least one of said processor, memory and other SoC circuitry.
3 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to make at least some use of said at least one of said processor, memory and other SoC circuitry.
4 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to embody functions other than a time code receiver clock source.
5 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to transmit said clock signal to a GPS receiver to improve a performance thereof.
6 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to transmit said clock signal to an inertial navigation module to improve a performance thereof.
7 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to adjust other oscillators or clocks in said SoC.
8 . The SoC as recited in claim 1 wherein said time code receiver clock source is configured to receive time and frequency information from time code transmitters other than WWVB and produce a further signal indicating that said clock signal does not qualify as a Stratum-1 clock signal.
9 . A method of serving a Stratum-1 clock signal from a system-on-a-chip (SoC), comprising:
receiving a phase-modulated timing signal from WWVB into a time code receiver clock source supported by a monolithic substrate;
generating a clock signal for said SoC based on said phase-modulated timing signal; and
employing said phase-modulated timing signal in at least one of a processor, memory and other SoC circuitry supported by said monolithic substrate.
10 . The method as recited in claim 9 wherein said time code receiver clock source makes at least some use of said at least one of said processor, memory and other SoC circuitry.
11 . The method as recited in claim 9 further comprising transmitting said clock signal to a GPS receiver to improve a performance thereof.
12 . The method as recited in claim 9 further comprising transmitting said clock signal to an inertial navigation module to improve a performance thereof.
13 . The method as recited in claim 9 further comprising employing said clock signal to adjust other oscillators or clocks in said SoC.
14 . The method as recited in claim 9 further comprising:
receiving time and frequency information from time code transmitters other than WWVB into said time code receiver clock source; and
producing a further signal indicating that said clock signal does not qualify as a Stratum-1 clock signal.
15 . A device, comprising:
an SoC, including:
a monolithic substrate,
a time code receiver clock source supported by said monolithic substrate and configured to receive a timing signal and generate a clock signal for said SoC, and
at least one of a processor, memory and other SoC circuitry supported by said monolithic substrate and configured to receive said clock signal from said time code receiver clock source;
a user interface;
other device hardware, firmware or software; and
a bus coupling said SoC, said user interface and said other device hardware, firmware or software.
16 . The device as recited in claim 15 wherein a semiconductor fabrication and integration scale and technology of said time code receiver clock source is identical to said at least one of said processor, memory and other SoC circuitry.
17 . The device as recited in claim 15 wherein said time code receiver clock source is configured to make at least some use of said at least one of said processor, memory and other SoC circuitry.
18 . The device as recited in claim 15 wherein said time code receiver clock source is configured to embody functions other than a time code receiver clock source.
19 . The device as recited in claim 15 wherein said time code receiver clock source is configured to transmit said clock signal to a GPS receiver to improve a performance thereof.
20 . The device as recited in claim 15 wherein said time code receiver clock source is configured to transmit said clock signal to an inertial navigation module to improve a performance thereof.
21 . The device as recited in claim 15 wherein said time code receiver clock source is configured to adjust other oscillators or clocks in said device.
22 . The device as recited in claim 15 wherein said time code receiver clock source is configured to receive time and frequency information from time code transmitters other than WWVB and produce a further signal indicating that said clock signal does not qualify as a Stratum-1 clock signal.