Pre-charge sensing scheme for non-volatile memory (NVM)
View Patent ↗The pipe effect can significantly degrade flash performance. A method to significantly reduce pipe current and (or neighbor current using a pre-charge sequence) is disclosed. A dedicated read order keeps the sensing node facing the section of the pipe which was pre-charged. The technique involves pre-charging several global bitlines (such as metal bitlines, or MBLs) and local bitlines (such as diffusion bitlines, or DBLs). The pre-charged global bitlines are selected according to a pre-defined table per each address. The selection of the global bitlines is done according to whether these global bitlines will interfere with the pipe during the next read cycle.
1. A non-volatile memory (“NVM”) device comprising
NVM cells in an NVM array; and
control logic to cause a circuit to pre-charge or discharge one or more bitlines not directly connected with one or more NVM cells being read, wherein pre-charging or discharging comprises pre-charging or discharging several global bitlines and local bitlines, and wherein the selection of the global bitlines is done according to whether these global bitlines will interfere with sensing during a next read cycle.
2. The device of claim 1 , wherein said control logic further causes reading of said one or more NVM cells to occur in an order which keeps a sensing node of said cells being read facing a bitline which has been pre-charged or discharged.
3. The device of claim 1 , wherein the pre-charged or discharged global bit lines are selected according to a pre-defined table per each address.
4. A non-volatile memory (“NVM”) device comprising:
a plurality of non-volatile memory (NVM) cells which are arranged in a row of memory cells and which are selectively connected to a first bitline and a second bitline, wherein one of the bitlines is a sensing node; and
control logic to cause a circuit to pre-charge or discharge global bitlines and local bitlines, wherein the pre-charged or discharged global bit lines are selected so as to mitigate pipe effect during a next read cycle, and to perform read in an order which keeps a sensing node facing a bitline which was precharged or discharged.
5. The device of claim 4 wherein the pre-charged or discharged global bit lines are selected according to a pre-defined table per each address.