Control circuit of transistor and method
A control circuit, which controls a transistor including a gate and a field plate, includes: a detecting circuit which detects a driving timing to drive the transistor; a timing controlling circuit which controls a first driving timing to drive the gate and a second driving timing to drive the field plate, in response to the driving timing; and a driving circuit which drives the gate in response to the first driving timing, and drives the field plate in response to the second driving timing.
1. A control circuit which controls a transistor including a gate and a field plate, the control circuit comprising:
a detecting circuit which detects a driving timing to drive the transistor;
a timing controlling circuit which controls a first driving timing to drive the gate and a second driving timing to drive the field plate, in response to the driving timing; and
a driving circuit which drives the gate in response to the first driving timing, and drives the field plate in response to the second driving timing.
2. The control circuit according to claim 1 , wherein
the detecting circuit detects a conducting timing to make the transistor conductive as the driving timing; and
the timing controlling circuit generates the first driving timing and the second driving timing which is later than the first driving timing, in response to the conducting timing.
3. The control circuit according to claim 1 , wherein
the detecting circuit further generates a termination timing to terminate the driving of the transistor;
the timing controlling circuit further controls a first termination timing to terminate the driving of the gate and a second termination timing to terminate the driving of the field plate, in response to the termination timing; and
the driving circuit terminates the driving of the gate in response to the first termination timing, and terminates the driving of the field plate in response to the second termination timing.
4. The control circuit according to claim 3 , wherein
the detecting circuit generates a non-conducting timing to make the transistor non-conductive as the termination timing;
the timing controlling circuit generates the second termination timing and the first termination timing which is later than the second termination timing, in response to the non-conducting timing.
5. The control circuit according to claim 1 , wherein
the driving circuit drives the field plate by a voltage which is higher than a driving voltage of the gate.
6. The control circuit according to claim 1 , wherein
the transistor includes a high-electron-mobility compound semiconductor transistor.
7. A control system of a transistor comprising:
a transistor including a gate and a field plate;
a detecting circuit which detects a driving timing to drive the transistor;
a timing controlling circuit which controls a first driving timing to drive the gate and a second driving timing to drive the field plate, in response to the driving timing; and
a driving circuit which drives the gate in response to the first driving timing, and drives the field plate in response to the second driving timing.
8. The control system of the transistor according to claim 7 , wherein
the detecting circuit detects a conducting timing to make the transistor conductive as the driving timing; and
the timing controlling circuit generates the first driving timing and the second driving timing which is later than the first driving timing, in response to the conducting timing.
9. The control system of the transistor according to claim 7 , wherein
the detecting circuit further generates a termination timing to terminate the driving of the transistor;
the timing controlling circuit further controls a first termination timing to terminate the driving of the gate and a second termination timing to terminate the driving of the field plate, in response to the termination timing; and
the driving circuit terminates the driving of the gate in response to the first termination timing, and terminates the driving of the field plate in response to the second termination timing.
10. The control system of the transistor according to claim 9 , wherein
the detecting circuit generates a non-conducting timing to make the transistor non-conductive as the termination timing;
the timing controlling circuit generates the second termination timing and the first termination timing which is later than the second termination timing, in response to the non-conducting timing.
11. The control system of the transistor according to claim 7 , wherein
the driving circuit drives the field plate by a voltage which is higher than a driving voltage of the gate.
12. A method for controlling a transistor including a field plate and a gate, the method comprising
driving the field plate and the gate at different timings.
13. The method for controlling the transistor according to claim 12 , further comprising
starting the driving of the field plate after starting the driving of the gate.
14. The method for controlling the transistor according to claim 12 , further comprising
terminating the driving of the gate after terminating the driving of the field plate.
15. The method for controlling the transistor according to claim 12 , further comprising
driving the field plate by a voltage higher than a driving voltage of the gate.
16. A device comprising:
a composite semiconductor-based transistor;
a first terminal coupled to a gate of the composite semiconductor-based transistor; and
a second terminal coupled to a field plate of the composite semiconductor-based transistor;
wherein the first terminal and the second terminal are capable of being driven independently from outside.