IP Library Granted Patent US 8,974,267
Granted Patent B2
US 8,974,267 · App. 13/311,575 · Granted Mar 10, 2015

Insert carrier and method for the simultaneous double-side material-removing processing of semiconductor wafers

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Quick Facts
Patent No.
US 8,974,267
App. No.
13/311,575
Granted
Mar 10, 2015
Kind
B2
Abstract

An insert carrier is configured to receive at least one semiconductor wafer for double-side processing of the wafer between two working disks of a lapping, grinding or polishing process. The insert carrier includes a core of a first material that has a first surface and a second surface, and at least one opening configured to receive a semiconductor wafer. A coating at least partially covers the first and second surfaces of the core. The coating includes a surface remote from the core that includes a structuring including elevations and depressions. A correlation length of the elevations and depressions is in a range of 0.5 mm to 25 mm and an aspect ratio of the structuring is in a range of 0.0004 to 0.4.

Claims (23)

1. An insert carrier configured to receive at least one semiconductor wafer for double-side processing of the wafer between two working disks of a lapping, grinding or polishing process, the insert carrier comprising:

a core including a first material and having a first surface and a second surface;

at least one opening configured to receive a semiconductor wafer; and

a coating at least partially covering the first and second surfaces of the core, the coating including a surface remote from the core that includes a structuring including a multiplicity of elevations and depressions distributed in a pattern across the coating such that a correlation length of the elevations and depressions is in a range of 0.5 mm to 25 mm, and wherein an aspect ratio of the structuring is in a range of 0.0004 to 0.4.

2. The insert carrier as recited in claim 1 , wherein the first material is a metal and the second material is a plastic.

3. The insert carrier as recited in claim 1 , wherein the coating covers each of the first and second surfaces of the core in the form of one continuous layer.

4. The insert carrier as recited in claim 1 , wherein the elevations constitute between 5% and 80% of a total area of the coating.

5. The insert carrier as recited in claim 1 , wherein the correlation length of the elevations and depressions of the structuring is in a range of 1 mm to 10 mm.

6. The insert carrier as recited in claim 1 , wherein aspect ratio of the structuring is in a range of 0.004 to 0.1.

7. The insert carrier as recited in claim 1 , further comprising a third material extending continuously from the first surface of the core through at least one of the at least one opening to the second surface of the core.

8. The insert carrier as recited in claim 7 , wherein the third material extends through each of the at least one opening from the first surface of the core to the second surface of the core and completely lines a wall area of each of the at least one opening.

9. The insert carrier as recited in claim 8 , wherein the third material is identical to the second material and forms a continuous layer with the second material.

10. A method of simultaneous double-side material-removing processing of at least one semiconductor wafer, the method comprising:

providing a lapping, grinding or polishing apparatus with two rotating working disks;

disposing an insert carrier in a working gap formed between the working disks, the insert carrier comprising:

a core including a first material and having a first surface and a second surface,

at least one opening configured to receive a semiconductor wafer, and

a coating at least partially covering the first and second surfaces of the core, the coating including a surface remote from the core that includes a structuring including a multiplicity of elevations and depressions distributed in a pattern across the coating such that a correlation length of the elevations and depressions is in a range of 0.5 mm to 25 mm, and wherein an aspect ratio of the structuring being in a range of 0.0004 to 0.4;

disposing each of the at least one semiconductor wafer in a respective one of the at least one opening; and

rotating the working disks so as to move the semiconductor wafer under pressure in the working gap formed between the working disks and such that each of the elevations come into contact with one of the working disks and the core and the depressions of the coating do not come into contact with the working disks.

11. The method as recited in claim 10 , wherein each working disk includes a working layer containing bonded abrasive, and further comprising feeding a cooling lubricant free of abrasive into the working gap.

12. The method as recited in claim 10 , wherein the working disks are circular and wherein the method uses a single insert carrier that covers the entire working disk, the method including driving the insert carrier with eccentrically rotating guide rollers disposed at a circumference of the working disk so as to impart an orbital movement of the insert carrier so as to maintain a respective stationary area under each semiconductor wafer that is continuously completely covered by the respective semiconductor wafer.

13. The method as recited in claim 10 , wherein the working disks are ring shaped and the method includes the use of three insert carriers each including an opening for receiving a respective semiconductor wafer, each insert carrier having an outer toothing so as to revolve with inherent rotation about a rotation axis in coordination with a rolling apparatus including an inner pin wheel and an outer pin wheel disposed concentrically with respect to the rotation axis of the working disks and the toothing.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE DATE OF THE CHANGE OF ADDRESS FROM 03/12/2020 TO 12/03/2020 PREVIOUSLY RECORDED AT REEL: 056719 FRAME: 0881. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 1, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 057561/0451 →
CHANGE OF ADDRESS Recorded Jun 30, 2021
From: SILTRONIC AG
To: SILTRONIC AG
Reel/Frame 056719/0881 →