IP Library Granted Patent US 8,754,372
Granted Patent B2
US 8,754,372 · App. 13/312,152 · Granted Jun 17, 2014

Structure and method for determining a defect in integrated circuit manufacturing process

Inventor: Hong Xiao (Pleasanton, CA)
Assignee: Hermes Microvision Inc.
H01J37/26H01J2237/2814H01J2237/24592
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Quick Facts
Patent No.
US 8,754,372
App. No.
13/312,152
Granted
Jun 17, 2014
Kind
B2
Abstract

The present invention discloses a structure and a method for determining a defect in integrated circuit manufacturing process. Test keys are designed for the structure to be the interlaced arrays of grounded and floating conductive cylinders, and the microscopic image can be predicted to be an interlaced pattern of bright voltage contrast (BVC) and dark voltage contrast (DVC) signals for a charged particle beam imaging system. The system can detect the defects by comparing patterns of the detected VC signals and the predicted VC signals.

Claims (7)

1. A test structure for determining a defect of a semiconductor device, comprising:

a plurality first cylindrical conductors, each of said first cylindrical conductors being grounded wherein said first cylindrical conductor is grounded through at least one first conductive plug and an active area wherein said first conductive plug and said active area are under said first cylindrical conductor; and

a plurality of second cylindrical conductors, each of said second cylindrical conductors being floated, said first and second cylindrical conductors being interlaced and vertical to a upper surface of said test structure wherein said second cylindrical conductor is floated through at least one second conductive plug and an isolation member,

wherein said defect is determined by monitoring the voltage contrast from a charged particle microscope image of said first and second cylindrical conductors.

2. The test structure for determining a defect of a semiconductor device of claim 1 , wherein said defect comprises a piping defect between said first and second conductive plugs.

3. The test structure for determining a defect of a semiconductor device of claim 1 , wherein said defect comprises an electrical short between said first and second cylindrical conductors.

4. The test structure for determining a defect of a semiconductor device of claim 1 , wherein said defect is determined by monitoring a bright voltage contrast of said first and second cylindrical conductors.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2020
From: HERMES MICROVISION, INC.
To: HERMES MICROVISION INCORPORATED B.V.
Reel/Frame 054866/0742 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2020
From: HERMES MICROVISION INCORPORATED B.V.
To: ASML NETHERLANDS B.V.
Reel/Frame 054870/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2014
From: XIAO, HONG
To: HERMES MICROVISION INC.
Reel/Frame 032601/0144 →
Continuity (2)
Continuation 12240048 · Sep 29, 2008
Related Publication 20120074314A1 · Mar 29, 2012