IP Library Granted Patent US 9,320,144
Granted Patent B2
US 9,320,144 · App. 13/319,158 · Granted Apr 19, 2016

Method of forming a semiconductor socket

Inventor: James Rathburn (Mound, MN)
Assignee: HSIO Technologies, LLC
H05K1/141H01R12/57H01R12/52H05K3/3436H05K2201/0311H05K2201/049H05K2201/10295H05K2201/10719Y10T29/49139Y10T29/49147
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,320,144
App. No.
13/319,158
Granted
Apr 19, 2016
Kind
B2
Abstract

A semiconductor socket including a substrate with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete contact members are located in the plurality of the through holes. The plurality of contact members each include a proximal end accessible from the second surface, and a distal end extending above the first surface. At least one dielectric layer is bonded to the second surface of the substrate with recesses corresponding to target circuit geometry. A conductive material deposited in at least a portion of the recesses to form conductive traces redistributing terminal pitch of the proximal ends of the contact members.

Claims (33)

1. A method of forming a semiconductor socket comprising the steps of:

providing a substrate with a plurality of through holes extending from a first surface to a second surface, the substrate having a plurality of recesses formed in the second surface that overlap with the through holes;

preparing separate from the substrate a plurality of discrete contact members comprising distal portions with cantilever beams and proximal portions configured to reside in the recesses formed in the second surface of the substrate;

mechanically inserting the distal portions of the discrete contact members in a plurality of the recesses so that the cantilever beams extend into the through holes and are located above the first surface of the substrate a sufficient amount to permit flexure when coupled with terminal on semiconductor devices, and the proximal ends positioned in the recesses and accessible from the second surface;

depositing at least one dielectric layer selectively on the second surface of the substrate to create trace recesses corresponding to a target circuit geometry;

depositing a conductive material in a plurality of the trace recesses to form conductive traces redistributing terminal pitch of the proximal ends of the contact members; and

compressively engaging terminals on a first semiconductor device with the distal ends of the contact members to elastically deform and flex the cantilever beams toward the first surface of the substrate.

2. The method of claim 1 comprising the step of electrically coupling the proximal ends of the contact members with terminal on a circuit member, wherein the circuit member is selected from one of a dielectric layer, a printed circuit board, a flexible circuit, a bare die device, an integrated circuit device, organic or inorganic substrates, or a rigid circuit.

3. The method of claim 1 comprising soldering the proximal ends of the contact members with terminal on a printed circuit board.

4. The method of claim 1 wherein the step of mechanically inserting comprises one of stitching or vibratory techniques.

5. The method of claim 1 comprising printing an elastically compliant layer between the second surface and a portion of the conductive traces.

6. The method of claim 1 comprising printing the trace recesses with a substantially rectangular cross-sectional shape.

7. The method of claim 1 comprising the steps of:

printing at least one electrical device on the semiconductor socket; and

electrically coupling the electrical device to the circuit geometry.

8. The method of claim 1 comprising the steps of:

locating pre-formed conductive materials in one or more of the trace recesses; and

plating the trace recesses to form conductive traces with cross-sectional shapes corresponding to a cross-sectional shape of the trace recesses.

9. The method of claim 1 comprising printing at least one additional circuitry plane on the second surface of the substrate.

10. The method of claim 1 comprising deforming the distal ends of the contact members after insertion of the contact members in the substrate.

11. The method of claim 1 comprising the step of attaching a solder ball to the conductive traces at a location offset from the proximal ends of the contact members.

12. The method of claim 1 comprising the steps of:

disengaging terminals on the first semiconductor device from the distal ends of the contact members; and

compressively engaging terminals on a second semiconductor device with the distal ends of the contact members to flex the cantilever beams toward the first surface of the substrate.

13. A method of forming a semiconductor socket comprising the steps of:

providing a substrate with a plurality of through holes extending from a first surface to a second surface, the substrate having a plurality of recesses formed in the second surface that overlap with the through holes;

preparing separate from the substrate a plurality of discrete contact members comprising distal portions with cantilever beams and proximal portions configured to reside in the recesses formed in the second surface of the substrate;

mechanically inserting the distal portions of the discrete contact members in a plurality of the recesses so that, the cantilever beams extend into the through holes and are located above the first surface of the substrate a sufficient amount to permit flexure when coupled with terminal on semiconductor devices, and the, proximal ends positioned in the recesses and accessible from the second surface;

depositing at least one dielectric layer selectively on the second surface of the substrate to create trace recesses corresponding to a target circuit geometry;

depositing a conductive material in a plurality of the trace recesses to form conductive traces redistributing terminal pitch of the proximal ends of the contact members;

compressively engaging terminals on a first semiconductor device with the distal ends of the contact members to flex the cantilever beams toward the first surface of the substrate;

attaching a solder ball to the conductive traces at a location offset from the proximal ends of the contact members; and

electrically coupling the solder balls with terminals on a circuit member, wherein the circuit member is selected from one of a printed circuit board, a flexible circuit, a bare die device, an integrated circuit device, organic or inorganic substrates, or a rigid circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2023
From: HSIO TECHNOLOGIES, LLC
To: LCP MEDICAL TECHNOLOGIES, LLC
Reel/Frame 065391/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2011
From: RATHBURN, JAMES
To: HSIO TECHNOLOGIES, LLC
Reel/Frame 027184/0194 →
Continuity (2)
Provisional Application 61187873 · Jun 17, 2009
Related Publication 20120051016A1 · Mar 1, 2012