Semiconductor device and fabrication method therefor
View Patent ↗A semiconductor device includes bit lines ( 12 ) that are provided in a semiconductor substrate ( 10 ) an ONO film ( 14 ) that is provided on the semiconductor substrate; word lines that are provided on the ONO film ( 14 ) and extend in a width direction of the bit lines ( 12 ); and a dummy layer ( 44 ) that extends in the width direction of the bit lines ( 12 ) and is provided in a bit-line contact region ( 40 ) having contact holes formed to connect the bit lines ( 12 ) with wiring layers ( 34 ). In accordance with the present invention, the proximity effect at the time of word line formation can be restrained, and the variation in the widths of the word lines can be made smaller, or current leakage between the bit lines and the semiconductor substrate can be restrained.
1. A method of fabricating a semiconductor device, comprising the steps of:
providing a semiconductor substrate;
forming bit lines in the semiconductor substrate in a first direction by injecting ions into the semiconductor substrate, wherein the bit lines are spaced apart from one another by an interval;
forming an oxide-nitride-oxide (ONO) film on the semiconductor substrate;
forming a polycrystalline silicon film on the ONO film;
patterning the polycrystalline silicon film to form a plurality of word lines and at least one dummy layer on the ONO film, the plurality of word lines extending in a second direction that is perpendicular to the first direction, and the at least one dummy layer is formed in the interval and in a bit-line contact region between a first one of the plurality of word lines and a second one of the plurality of word lines adjacent to the first one;
wherein a first maximum spacing between the at least one dummy layer and the first one of the plurality of word lines is substantially equal to a second maximum spacing between the at least one dummy layer and the second one of the plurality of word lines.
2. The method as claimed in claim 1 , further comprising the step of forming sidewall layers on both sidewalls of each of the plurality of word lines and on both sidewalls of the at least one dummy layer.
3. The method as claimed in claim 2 , wherein the at least one dummy layer is formed on the ONO film above and between two of the bit lines so that the at least one dummy layer does not overlap the bit lines.
4. The method as claimed in claim 3 , wherein the sidewall layers formed on the at least one dummy layer overlap the bit lines.
5. The method as claimed in claim 4 , further comprising:
forming an interlayer insulating (ILI) film over the plurality of word lines, the dummy layer, the sidewall layers of each of the plurality of word lines and the at least one dummy layer and the ONO film; and
forming contact holes through the ILI film on each side of the at least one dummy layer and the ONO film filled with a metal to electrically connect with the bit lines on each side of the at least one dummy layer.
6. The method as claimed in claim 5 , wherein each of the contact holes partly overlap one of the sidewall layers formed on the at least one dummy layer.
7. The method as claimed in claim 1 , wherein the at least one dummy layer comprises a width that is greater than a width of each of the plurality of word lines.
8. The method as claimed in claim 1 , wherein the first maximum spacing is substantially equal to a third maximum spacing between a third one of the plurality of word lines and a fourth one of the plurality of word lines adjacent to the third one.
9. A method of fabricating a semiconductor device, comprising the steps of:
providing a semiconductor substrate;
injecting ions into the semiconductor substrate in a first direction to forming bit lines therein, wherein the bit lines are spaced apart from one another by an interval;
forming an ONO film on the substrate;
forming a polycrystalline silicon film on the ONO film;
patterning the polycrystalline silicon film to concurrently form on the ONO film:
a plurality of word lines extending in a second direction that is perpendicular to the first direction; and
at least one dummy layer in the interval and in a bit-line contact region between a first one of the plurality of word lines and a second one of the plurality of word lines adjacent to the first one;
wherein the at least one dummy layer comprises a width that is greater than a width of the plurality of word lines,
wherein a first maximum spacing between the at least one dummy layer and the first one of the plurality of word lines is substantially equal to a second maximum spacing between the at least one dummy layer and the second one of the plurality of word lines.
10. The method as claimed in claim 9 , wherein the at least one dummy layer is formed on the ONO film above and between two of the bit lines so that the at least one dummy layer does not overlap the bit lines.
11. The method as claimed in claim 10 , further comprising the step of forming sidewall layers on both sidewalls of each of the word lines and on both sidewalls of the at least one dummy layer.
12. The method as claimed in claim 11 , wherein the sidewall layers formed on the at least one dummy layer overlap the bit lines.
13. The method as claimed in claim 12 , further comprising:
forming an interlayer insulating (ILI) film over the plurality of word lines, the at least one dummy layer, the sidewall layers of each of the plurality of word lines and the at least one dummy layer and the ONO film; and
forming contact holes through the ILI film on each side of the at least one dummy layer and the ONO film filled with a metal to electrically connect with the bit lines on each side of the at least one dummy layer.
14. The method as claimed in claim 13 , wherein each of the contact holes partly overlap one of the sidewall layers formed on the at least one dummy layer.