SPARSE PROGRAMMING OF ANALOG MEMORY CELLS
A method for data storage in a memory including an array of analog memory cells, includes selecting a group of the memory cells such that each memory cell in the group has one or more neighbor memory cells in the array that are excluded from the group. Data is stored in the group of the memory cells while excluding the neighbor memory cells from programming as long as the data is stored in the group of the memory cells.
1 . A method for data storage, comprising:
in a memory comprising an array of analog memory cells, selecting a group of the memory cells such that each memory cell in the group has one or more neighbor memory cells in the array that are excluded from the group; and
storing data in the group of the memory cells while excluding the neighbor memory cells from programming as long as the data is stored in the group of the memory cells.
2 . The method according to claim 1 , wherein selecting the group comprises excluding from the group all the immediate neighbor memory cells of each memory cell in the group.
3 . The method according to claim 1 , wherein selecting the group comprises, for at least a part of the array, excluding from the group all the memory cells belonging to odd-order word lines or all the memory cells belonging to even-order word lines.
4 . The method according to claim 1 , wherein selecting the group comprises, for at least a part of the array, excluding from the group all the memory cells belonging to odd-order bit lines or all the memory cells belonging to even-order bit lines.
5 . The method according to claim 1 , wherein selecting the group comprises, for each memory cell in the group, excluding from the group any neighbor memory cells that is adjacent to the memory cell and belongs to a same word line or bit line as the memory cell.
6 . The method according to claim 1 , wherein the memory cells in the array are assigned to hold n bits per cell, and wherein storing the data comprises programming the memory cells in the group with only k bits per cell, k<n.
7 . The method according to claim 1 , wherein storing the data comprises writing the data using programming commands that store a given data page in all the memory cells of a respective word line.
8 . The method according to claim 1 , wherein storing the data comprises writing the data using programming commands that store a given data page either in odd-order or even-order memory cells of a respective word line.
9 . The method according to claim 1 , wherein storing the data comprises storing sensitive information in the group of the memory cells.
10 . The method according to claim 9 , wherein the sensitive information comprises at least one information type selected from a group of types consisting of management information and power-down information.
11 . The method according to claim 1 , wherein storing the data comprises applying to the data an additional protection mechanism that is not applied to other data stored outside the group.
12 . The method according to claim 11 , wherein applying the additional protection mechanism comprises performing at least one action selected from a group of actions consisting of:
storing the data at a lower storage density relative to the other data;
encoding the data with a stronger Error Correction Code (ECC) relative to the other data; and
programming the memory cells in the group using a sequence of programming pulses that increase by an increment that is smaller relative to increments used outside the group.
13 . A data storage apparatus, comprising:
an interface, which is configured to communicate with a memory comprising an array of analog memory cells; and
storage circuitry, which is configured to select a group of the memory cells such that each memory cell in the group has one or more neighbor memory cells in the array that are excluded from the group, and to store data in the group of the memory cells while excluding the neighbor memory cells from programming as long as the data is stored in the group of the memory cells.
14 . The apparatus according to claim 13 , wherein the storage circuitry is configured to exclude from the group all the immediate neighbor memory cells of each memory cell in the group.
15 . The apparatus according to claim 13 , wherein, for at least a part of the array, the storage circuitry is configured to exclude from the group all the memory cells belonging to odd-order word lines or all the memory cells belonging to even-order word lines.
16 . The apparatus according to claim 13 , wherein, for at least a part of the array, the storage circuitry is configured to exclude from the group all the memory cells belonging to odd-order bit lines or all the memory cells belonging to even-order bit lines.
17 . The apparatus according to claim 13 , wherein the storage circuitry is configured to exclude from the group, for each memory cell in the group, any neighbor memory cells that is adjacent to the memory cell and belongs to a same word line or bit line as the memory cell.
18 . The apparatus according to claim 13 , wherein the memory cells in the array are assigned to hold n bits per cell, and wherein the storage circuitry is configured to store the data by programming the memory cells in the group with only k bits per cell, k<n.
19 . The apparatus according to claim 13 , wherein the storage circuitry is configured to store the data using programming commands that store a given data page in all the memory cells of a respective word line.
20 . The apparatus according to claim 13 , wherein the storage circuitry is configured to store the data using programming commands that store a given data page either in odd-order or even-order memory cells of a respective word line.
21 . The apparatus according to claim 13 , wherein the storage circuitry is configured to store sensitive information in the group of the memory cells while excluding the neighbor memory cells.
22 . The apparatus according to claim 21 , wherein the sensitive information comprises at least one information type selected from a group of types consisting of management information and power-down information.
23 . The apparatus according to claim 13 , wherein the storage circuitry is configured to apply to the data an additional protection mechanism that is not applied to other data stored outside the group.
24 . The apparatus according to claim 23 , wherein the storage circuitry is configured to apply the additional protection mechanism by performing at least one action selected from a group of actions consisting of:
storing the data at a lower storage density relative to the other data;
encoding the data with a stronger Error Correction Code (ECC) relative to the other data; and
programming the memory cells in the group using a sequence of programming pulses that increase by an increment that is smaller relative to increments used outside the group.
25 . A data storage apparatus, comprising:
a memory comprising an array of analog memory cells; and
storage circuitry, which is configured to select a group of the memory cells such that each memory cell in the group has one or more neighbor memory cells in the array that are excluded from the group, and to store data in the group of the memory cells while excluding the neighbor memory cells from programming as long as the data is stored in the group of the memory cells.